xref: /linux/Documentation/devicetree/bindings/serial/mediatek,uart.yaml (revision bfb9e46b5bff33ebaac49cceb27256caceddeee5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12allOf:
13  - $ref: serial.yaml#
14
15description: |
16  The MediaTek UART is based on the basic 8250 UART and compatible
17  with 16550A, with enhancements for high speed baud rates and
18  support for DMA.
19
20properties:
21  compatible:
22    oneOf:
23      - const: mediatek,mt6577-uart
24      - items:
25          - enum:
26              - mediatek,mt2701-uart
27              - mediatek,mt2712-uart
28              - mediatek,mt6580-uart
29              - mediatek,mt6582-uart
30              - mediatek,mt6589-uart
31              - mediatek,mt6755-uart
32              - mediatek,mt6765-uart
33              - mediatek,mt6779-uart
34              - mediatek,mt6795-uart
35              - mediatek,mt6797-uart
36              - mediatek,mt6893-uart
37              - mediatek,mt7622-uart
38              - mediatek,mt7623-uart
39              - mediatek,mt7629-uart
40              - mediatek,mt7981-uart
41              - mediatek,mt7986-uart
42              - mediatek,mt7988-uart
43              - mediatek,mt8127-uart
44              - mediatek,mt8135-uart
45              - mediatek,mt8173-uart
46              - mediatek,mt8183-uart
47              - mediatek,mt8186-uart
48              - mediatek,mt8188-uart
49              - mediatek,mt8192-uart
50              - mediatek,mt8195-uart
51              - mediatek,mt8365-uart
52              - mediatek,mt8516-uart
53          - const: mediatek,mt6577-uart
54
55  reg:
56    description: The base address of the UART register bank
57    maxItems: 1
58
59  clocks:
60    minItems: 1
61    items:
62      - description: The clock the baudrate is derived from
63      - description: The bus clock for register accesses
64
65  clock-names:
66    minItems: 1
67    items:
68      - const: baud
69      - const: bus
70
71  dmas:
72    items:
73      - description: phandle to TX DMA
74      - description: phandle to RX DMA
75
76  dma-names:
77    items:
78      - const: tx
79      - const: rx
80
81  interrupts:
82    minItems: 1
83    maxItems: 2
84
85  interrupt-names:
86    description:
87      The UART interrupt and optionally the RX in-band wakeup interrupt.
88    minItems: 1
89    items:
90      - const: uart
91      - const: wakeup
92
93  pinctrl-0: true
94  pinctrl-1: true
95
96  pinctrl-names:
97    minItems: 1
98    items:
99      - const: default
100      - const: sleep
101
102required:
103  - compatible
104  - reg
105  - clocks
106  - interrupts
107
108unevaluatedProperties: false
109
110examples:
111  - |
112    #include <dt-bindings/interrupt-controller/arm-gic.h>
113
114    serial@11006000 {
115        compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
116        reg = <0x11006000 0x400>;
117        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
118                     <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
119        interrupt-names = "uart", "wakeup";
120        clocks = <&uart_clk>, <&bus_clk>;
121        clock-names = "baud", "bus";
122        pinctrl-0 = <&uart_pin>;
123        pinctrl-1 = <&uart_pin_sleep>;
124        pinctrl-names = "default", "sleep";
125    };
126