xref: /linux/Documentation/devicetree/bindings/serial/mediatek,uart.yaml (revision 5f5598d945e2a69f764aa5c2074dad73e23bcfcb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12allOf:
13  - $ref: serial.yaml#
14
15description: |
16  The MediaTek UART is based on the basic 8250 UART and compatible
17  with 16550A, with enhancements for high speed baud rates and
18  support for DMA.
19
20properties:
21  compatible:
22    oneOf:
23      - const: mediatek,mt6577-uart
24      - items:
25          - enum:
26              - mediatek,mt2701-uart
27              - mediatek,mt2712-uart
28              - mediatek,mt6572-uart
29              - mediatek,mt6580-uart
30              - mediatek,mt6582-uart
31              - mediatek,mt6589-uart
32              - mediatek,mt6755-uart
33              - mediatek,mt6765-uart
34              - mediatek,mt6779-uart
35              - mediatek,mt6795-uart
36              - mediatek,mt6797-uart
37              - mediatek,mt6893-uart
38              - mediatek,mt7622-uart
39              - mediatek,mt7623-uart
40              - mediatek,mt7629-uart
41              - mediatek,mt7981-uart
42              - mediatek,mt7986-uart
43              - mediatek,mt7988-uart
44              - mediatek,mt8127-uart
45              - mediatek,mt8135-uart
46              - mediatek,mt8173-uart
47              - mediatek,mt8183-uart
48              - mediatek,mt8186-uart
49              - mediatek,mt8188-uart
50              - mediatek,mt8192-uart
51              - mediatek,mt8195-uart
52              - mediatek,mt8365-uart
53              - mediatek,mt8516-uart
54          - const: mediatek,mt6577-uart
55
56  reg:
57    description: The base address of the UART register bank
58    maxItems: 1
59
60  clocks:
61    minItems: 1
62    items:
63      - description: The clock the baudrate is derived from
64      - description: The bus clock for register accesses
65
66  clock-names:
67    minItems: 1
68    items:
69      - const: baud
70      - const: bus
71
72  dmas:
73    items:
74      - description: phandle to TX DMA
75      - description: phandle to RX DMA
76
77  dma-names:
78    items:
79      - const: tx
80      - const: rx
81
82  interrupts:
83    minItems: 1
84    maxItems: 2
85
86  interrupt-names:
87    description:
88      The UART interrupt and optionally the RX in-band wakeup interrupt.
89    minItems: 1
90    items:
91      - const: uart
92      - const: wakeup
93
94  pinctrl-0: true
95  pinctrl-1: true
96
97  pinctrl-names:
98    minItems: 1
99    items:
100      - const: default
101      - const: sleep
102
103required:
104  - compatible
105  - reg
106  - clocks
107  - interrupts
108
109unevaluatedProperties: false
110
111examples:
112  - |
113    #include <dt-bindings/interrupt-controller/arm-gic.h>
114
115    serial@11006000 {
116        compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
117        reg = <0x11006000 0x400>;
118        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
119                     <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
120        interrupt-names = "uart", "wakeup";
121        clocks = <&uart_clk>, <&bus_clk>;
122        clock-names = "baud", "bus";
123        pinctrl-0 = <&uart_pin>;
124        pinctrl-1 = <&uart_pin_sleep>;
125        pinctrl-names = "default", "sleep";
126    };
127