xref: /linux/Documentation/devicetree/bindings/serial/mediatek,uart.yaml (revision 170aafe35cb98e0f3fbacb446ea86389fbce22ea) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12allOf:
13  - $ref: serial.yaml#
14
15description: |
16  The MediaTek UART is based on the basic 8250 UART and compatible
17  with 16550A, with enhancements for high speed baud rates and
18  support for DMA.
19
20properties:
21  compatible:
22    oneOf:
23      - const: mediatek,mt6577-uart
24      - items:
25          - enum:
26              - mediatek,mt2701-uart
27              - mediatek,mt2712-uart
28              - mediatek,mt6580-uart
29              - mediatek,mt6582-uart
30              - mediatek,mt6589-uart
31              - mediatek,mt6755-uart
32              - mediatek,mt6765-uart
33              - mediatek,mt6779-uart
34              - mediatek,mt6795-uart
35              - mediatek,mt6797-uart
36              - mediatek,mt7622-uart
37              - mediatek,mt7623-uart
38              - mediatek,mt7629-uart
39              - mediatek,mt7986-uart
40              - mediatek,mt7988-uart
41              - mediatek,mt8127-uart
42              - mediatek,mt8135-uart
43              - mediatek,mt8173-uart
44              - mediatek,mt8183-uart
45              - mediatek,mt8186-uart
46              - mediatek,mt8188-uart
47              - mediatek,mt8192-uart
48              - mediatek,mt8195-uart
49              - mediatek,mt8365-uart
50              - mediatek,mt8516-uart
51          - const: mediatek,mt6577-uart
52
53  reg:
54    description: The base address of the UART register bank
55    maxItems: 1
56
57  clocks:
58    minItems: 1
59    items:
60      - description: The clock the baudrate is derived from
61      - description: The bus clock for register accesses
62
63  clock-names:
64    minItems: 1
65    items:
66      - const: baud
67      - const: bus
68
69  dmas:
70    items:
71      - description: phandle to TX DMA
72      - description: phandle to RX DMA
73
74  dma-names:
75    items:
76      - const: tx
77      - const: rx
78
79  interrupts:
80    minItems: 1
81    maxItems: 2
82
83  interrupt-names:
84    description:
85      The UART interrupt and optionally the RX in-band wakeup interrupt.
86    minItems: 1
87    items:
88      - const: uart
89      - const: wakeup
90
91  pinctrl-0: true
92  pinctrl-1: true
93
94  pinctrl-names:
95    minItems: 1
96    items:
97      - const: default
98      - const: sleep
99
100required:
101  - compatible
102  - reg
103  - clocks
104  - interrupts
105
106unevaluatedProperties: false
107
108examples:
109  - |
110    #include <dt-bindings/interrupt-controller/arm-gic.h>
111
112    serial@11006000 {
113        compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
114        reg = <0x11006000 0x400>;
115        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
116                     <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
117        interrupt-names = "uart", "wakeup";
118        clocks = <&uart_clk>, <&bus_clk>;
119        clock-names = "baud", "bus";
120        pinctrl-0 = <&uart_pin>;
121        pinctrl-1 = <&uart_pin_sleep>;
122        pinctrl-names = "default", "sleep";
123    };
124