1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/cdns,uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Cadence UART Controller 8 9maintainers: 10 - Michal Simek <michal.simek@amd.com> 11 12properties: 13 compatible: 14 oneOf: 15 - description: UART controller for Zynq-7xxx SoC 16 items: 17 - const: xlnx,xuartps 18 - const: cdns,uart-r1p8 19 - items: 20 - enum: 21 - axiado,ax3000-uart 22 - xlnx,zynqmp-uart 23 - const: cdns,uart-r1p12 24 25 reg: 26 maxItems: 1 27 28 interrupts: 29 maxItems: 1 30 31 clocks: 32 maxItems: 2 33 34 clock-names: 35 items: 36 - const: uart_clk 37 - const: pclk 38 39 cts-override: 40 description: | 41 Override the CTS modem status signal. This signal will 42 always be reported as active instead of being obtained 43 from the modem status register. Define this if your serial 44 port does not use this pin. 45 type: boolean 46 47 power-domains: 48 maxItems: 1 49 50 resets: 51 maxItems: 1 52 53required: 54 - compatible 55 - reg 56 - interrupts 57 - clocks 58 - clock-names 59 60allOf: 61 - $ref: serial.yaml# 62 - $ref: rs485.yaml# 63 - if: 64 properties: 65 compatible: 66 contains: 67 const: cdns,uart-r1p8 68 then: 69 properties: 70 power-domains: false 71 72unevaluatedProperties: false 73 74examples: 75 - | 76 uart0: serial@e0000000 { 77 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 78 clocks = <&clkc 23>, <&clkc 40>; 79 clock-names = "uart_clk", "pclk"; 80 reg = <0xe0000000 0x1000>; 81 interrupts = <0 27 4>; 82 }; 83