1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) 9 10maintainers: 11 - Richard Genoud <richard.genoud@bootlin.com> 12 13properties: 14 compatible: 15 oneOf: 16 - enum: 17 - atmel,at91rm9200-usart 18 - atmel,at91sam9260-usart 19 - items: 20 - const: atmel,at91rm9200-dbgu 21 - const: atmel,at91rm9200-usart 22 - items: 23 - const: atmel,at91sam9260-dbgu 24 - const: atmel,at91sam9260-usart 25 - items: 26 - enum: 27 - microchip,sam9x60-usart 28 - microchip,sam9x7-usart 29 - microchip,sama7d65-usart 30 - const: atmel,at91sam9260-usart 31 - items: 32 - const: microchip,sam9x60-dbgu 33 - const: microchip,sam9x60-usart 34 - const: atmel,at91sam9260-dbgu 35 - const: atmel,at91sam9260-usart 36 - items: 37 - const: microchip,sam9x7-dbgu 38 - const: atmel,at91sam9260-dbgu 39 - const: microchip,sam9x7-usart 40 - const: atmel,at91sam9260-usart 41 42 reg: 43 maxItems: 1 44 45 interrupts: 46 maxItems: 1 47 48 clock-names: 49 minItems: 1 50 items: 51 - const: usart 52 - const: gclk 53 54 clocks: 55 minItems: 1 56 items: 57 - description: USART Peripheral Clock 58 - description: USART Generic Clock 59 60 dmas: 61 items: 62 - description: TX DMA Channel 63 - description: RX DMA Channel 64 65 dma-names: 66 items: 67 - const: tx 68 - const: rx 69 70 atmel,usart-mode: 71 $ref: /schemas/types.yaml#/definitions/uint32 72 description: 73 Must be either <AT91_USART_MODE_SPI> for SPI or 74 <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h). 75 enum: [ 0, 1 ] 76 77 atmel,use-dma-rx: 78 type: boolean 79 description: use of PDC or DMA for receiving data 80 81 atmel,use-dma-tx: 82 type: boolean 83 description: use of PDC or DMA for transmitting data 84 85 atmel,fifo-size: 86 $ref: /schemas/types.yaml#/definitions/uint32 87 description: 88 Maximum number of data the RX and TX FIFOs can store for FIFO 89 capable USARTS. 90 enum: [ 16, 32 ] 91 92required: 93 - compatible 94 - reg 95 - interrupts 96 - clock-names 97 - clocks 98 - atmel,usart-mode 99 100allOf: 101 - if: 102 properties: 103 atmel,usart-mode: 104 const: 1 105 then: 106 allOf: 107 - $ref: /schemas/spi/spi-controller.yaml# 108 109 properties: 110 atmel,use-dma-rx: false 111 112 atmel,use-dma-tx: false 113 114 atmel,fifo-size: false 115 116 "#size-cells": 117 const: 0 118 119 "#address-cells": 120 const: 1 121 122 required: 123 - "#size-cells" 124 - "#address-cells" 125 126 else: 127 allOf: 128 - $ref: /schemas/serial/serial.yaml# 129 - $ref: /schemas/serial/rs485.yaml# 130 131unevaluatedProperties: false 132 133examples: 134 - | 135 #include <dt-bindings/gpio/gpio.h> 136 #include <dt-bindings/interrupt-controller/irq.h> 137 #include <dt-bindings/mfd/at91-usart.h> 138 #include <dt-bindings/dma/at91.h> 139 140 /* use PDC */ 141 usart0: serial@fff8c000 { 142 compatible = "atmel,at91sam9260-usart"; 143 reg = <0xfff8c000 0x4000>; 144 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 145 interrupts = <7>; 146 clocks = <&usart0_clk>; 147 clock-names = "usart"; 148 atmel,use-dma-rx; 149 atmel,use-dma-tx; 150 rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>; 151 cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>; 152 dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>; 153 dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>; 154 dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>; 155 rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>; 156 }; 157 158 - | 159 #include <dt-bindings/gpio/gpio.h> 160 #include <dt-bindings/interrupt-controller/irq.h> 161 #include <dt-bindings/mfd/at91-usart.h> 162 #include <dt-bindings/dma/at91.h> 163 164 /* use DMA */ 165 usart1: serial@f001c000 { 166 compatible = "atmel,at91sam9260-usart"; 167 reg = <0xf001c000 0x100>; 168 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 169 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 170 clocks = <&usart0_clk>; 171 clock-names = "usart"; 172 atmel,use-dma-rx; 173 atmel,use-dma-tx; 174 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 175 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 176 dma-names = "tx", "rx"; 177 atmel,fifo-size = <32>; 178 }; 179 180 - | 181 #include <dt-bindings/gpio/gpio.h> 182 #include <dt-bindings/interrupt-controller/irq.h> 183 #include <dt-bindings/mfd/at91-usart.h> 184 #include <dt-bindings/dma/at91.h> 185 186 /* SPI mode */ 187 spi0: spi@f001c000 { 188 compatible = "atmel,at91sam9260-usart"; 189 reg = <0xf001c000 0x100>; 190 #address-cells = <1>; 191 #size-cells = <0>; 192 atmel,usart-mode = <AT91_USART_MODE_SPI>; 193 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 194 clocks = <&usart0_clk>; 195 clock-names = "usart"; 196 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 197 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 198 dma-names = "tx", "rx"; 199 cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>; 200 }; 201