1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/rtc/qcom-pm8xxx-rtc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PM8xxx PMIC RTC device 8 9maintainers: 10 - Satya Priya <quic_c_skakit@quicinc.com> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - qcom,pm8058-rtc 17 - qcom,pm8921-rtc 18 - qcom,pm8941-rtc 19 - qcom,pmk8350-rtc 20 - items: 21 - enum: 22 - qcom,pm8018-rtc 23 - const: qcom,pm8921-rtc 24 25 reg: 26 minItems: 1 27 maxItems: 2 28 29 reg-names: 30 minItems: 1 31 items: 32 - const: rtc 33 - const: alarm 34 35 interrupts: 36 maxItems: 1 37 38 allow-set-time: 39 $ref: /schemas/types.yaml#/definitions/flag 40 description: 41 Indicates that the setting of RTC time is allowed by the host CPU. 42 43 nvmem-cells: 44 items: 45 - description: 46 four-byte nvmem cell holding a little-endian offset from the Unix 47 epoch representing the time when the RTC timer was last reset 48 49 nvmem-cell-names: 50 items: 51 - const: offset 52 53 qcom,no-alarm: 54 type: boolean 55 description: 56 RTC alarm is not owned by the OS 57 58 qcom,uefi-rtc-info: 59 type: boolean 60 description: 61 RTC offset is stored as a four-byte GPS time offset in a 12-byte UEFI 62 variable 882f8c2b-9646-435f-8de5-f208ff80c1bd-RTCInfo 63 64 wakeup-source: true 65 66required: 67 - compatible 68 - reg 69 - interrupts 70 71additionalProperties: false 72 73examples: 74 - | 75 #include <dt-bindings/interrupt-controller/irq.h> 76 #include <dt-bindings/spmi/spmi.h> 77 78 spmi { 79 #address-cells = <2>; 80 #size-cells = <0>; 81 82 pmic@0 { 83 compatible = "qcom,pm8941", "qcom,spmi-pmic"; 84 reg = <0x0 SPMI_USID>; 85 #address-cells = <1>; 86 #size-cells = <0>; 87 88 rtc@6000 { 89 compatible = "qcom,pm8941-rtc"; 90 reg = <0x6000>, <0x6100>; 91 reg-names = "rtc", "alarm"; 92 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; 93 nvmem-cells = <&rtc_offset>; 94 nvmem-cell-names = "offset"; 95 }; 96 }; 97 }; 98... 99