xref: /linux/Documentation/devicetree/bindings/rtc/microchip,mpfs-rtc.yaml (revision 53597deca0e38c30e6cd4ba2114fa42d2bcd85bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml#
5
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Microchip PolarFire Soc (MPFS) RTC
9
10allOf:
11  - $ref: rtc.yaml#
12
13maintainers:
14  - Daire McNamara <daire.mcnamara@microchip.com>
15
16properties:
17  compatible:
18    oneOf:
19      - items:
20          - const: microchip,pic64gx-rtc
21          - const: microchip,mpfs-rtc
22      - const: microchip,mpfs-rtc
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    items:
29      - description: |
30          RTC_WAKEUP interrupt
31      - description: |
32          RTC_MATCH, asserted when the content of the Alarm register is equal
33          to that of the RTC's count register.
34
35  clocks:
36    items:
37      - description: |
38          AHB clock
39      - description: |
40          Reference clock: divided by the prescaler to create a time-based
41          strobe (typically 1 Hz) for the calendar counter. By default, the rtc
42          on the PolarFire SoC shares it's reference with MTIMER so this will
43          be a 1 MHz clock.
44
45  clock-names:
46    items:
47      - const: rtc
48      - const: rtcref
49
50  resets:
51    maxItems: 1
52
53required:
54  - compatible
55  - reg
56  - interrupts
57  - clocks
58  - clock-names
59
60additionalProperties: false
61
62examples:
63  - |
64    #include "dt-bindings/clock/microchip,mpfs-clock.h"
65    rtc@20124000 {
66        compatible = "microchip,mpfs-rtc";
67        reg = <0x20124000 0x1000>;
68        clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
69        clock-names = "rtc", "rtcref";
70        interrupts = <80>, <81>;
71    };
72...
73