1*16fd38abSAurelien Jarno# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*16fd38abSAurelien Jarno%YAML 1.2 3*16fd38abSAurelien Jarno--- 4*16fd38abSAurelien Jarno$id: http://devicetree.org/schemas/rng/rockchip,rk3568-rng.yaml# 5*16fd38abSAurelien Jarno$schema: http://devicetree.org/meta-schemas/core.yaml# 6*16fd38abSAurelien Jarno 7*16fd38abSAurelien Jarnotitle: Rockchip RK3568 TRNG 8*16fd38abSAurelien Jarno 9*16fd38abSAurelien Jarnodescription: True Random Number Generator on Rockchip RK3568 SoC 10*16fd38abSAurelien Jarno 11*16fd38abSAurelien Jarnomaintainers: 12*16fd38abSAurelien Jarno - Aurelien Jarno <aurelien@aurel32.net> 13*16fd38abSAurelien Jarno - Daniel Golle <daniel@makrotopia.org> 14*16fd38abSAurelien Jarno 15*16fd38abSAurelien Jarnoproperties: 16*16fd38abSAurelien Jarno compatible: 17*16fd38abSAurelien Jarno enum: 18*16fd38abSAurelien Jarno - rockchip,rk3568-rng 19*16fd38abSAurelien Jarno 20*16fd38abSAurelien Jarno reg: 21*16fd38abSAurelien Jarno maxItems: 1 22*16fd38abSAurelien Jarno 23*16fd38abSAurelien Jarno clocks: 24*16fd38abSAurelien Jarno items: 25*16fd38abSAurelien Jarno - description: TRNG clock 26*16fd38abSAurelien Jarno - description: TRNG AHB clock 27*16fd38abSAurelien Jarno 28*16fd38abSAurelien Jarno clock-names: 29*16fd38abSAurelien Jarno items: 30*16fd38abSAurelien Jarno - const: core 31*16fd38abSAurelien Jarno - const: ahb 32*16fd38abSAurelien Jarno 33*16fd38abSAurelien Jarno resets: 34*16fd38abSAurelien Jarno maxItems: 1 35*16fd38abSAurelien Jarno 36*16fd38abSAurelien Jarnorequired: 37*16fd38abSAurelien Jarno - compatible 38*16fd38abSAurelien Jarno - reg 39*16fd38abSAurelien Jarno - clocks 40*16fd38abSAurelien Jarno - clock-names 41*16fd38abSAurelien Jarno - resets 42*16fd38abSAurelien Jarno 43*16fd38abSAurelien JarnoadditionalProperties: false 44*16fd38abSAurelien Jarno 45*16fd38abSAurelien Jarnoexamples: 46*16fd38abSAurelien Jarno - | 47*16fd38abSAurelien Jarno #include <dt-bindings/clock/rk3568-cru.h> 48*16fd38abSAurelien Jarno bus { 49*16fd38abSAurelien Jarno #address-cells = <2>; 50*16fd38abSAurelien Jarno #size-cells = <2>; 51*16fd38abSAurelien Jarno 52*16fd38abSAurelien Jarno rng@fe388000 { 53*16fd38abSAurelien Jarno compatible = "rockchip,rk3568-rng"; 54*16fd38abSAurelien Jarno reg = <0x0 0xfe388000 0x0 0x4000>; 55*16fd38abSAurelien Jarno clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; 56*16fd38abSAurelien Jarno clock-names = "core", "ahb"; 57*16fd38abSAurelien Jarno resets = <&cru SRST_TRNG_NS>; 58*16fd38abSAurelien Jarno }; 59*16fd38abSAurelien Jarno }; 60*16fd38abSAurelien Jarno 61*16fd38abSAurelien Jarno... 62