xref: /linux/Documentation/devicetree/bindings/reset/qcom,shikra-audiocore-csr.yaml (revision 502d45774af09f1c681c754c4b7cdfb5d7f72fd9)
1*6ef11670SImran Shaik# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*6ef11670SImran Shaik%YAML 1.2
3*6ef11670SImran Shaik---
4*6ef11670SImran Shaik$id: http://devicetree.org/schemas/reset/qcom,shikra-audiocore-csr.yaml#
5*6ef11670SImran Shaik$schema: http://devicetree.org/meta-schemas/core.yaml#
6*6ef11670SImran Shaik
7*6ef11670SImran Shaiktitle: Audio Core CSR for Qualcomm Shikra SoC
8*6ef11670SImran Shaik
9*6ef11670SImran Shaikmaintainers:
10*6ef11670SImran Shaik  - Imran Shaik <imran.shaik@oss.qualcomm.com>
11*6ef11670SImran Shaik
12*6ef11670SImran Shaikdescription: |
13*6ef11670SImran Shaik  Audio Core CSR module provides the resets on Qualcomm Shikra SoC platform.
14*6ef11670SImran Shaik
15*6ef11670SImran Shaik  See also:
16*6ef11670SImran Shaik  - include/dt-bindings/clock/qcom,shikra-audiocorecc.h
17*6ef11670SImran Shaik
18*6ef11670SImran Shaikproperties:
19*6ef11670SImran Shaik  compatible:
20*6ef11670SImran Shaik    const: qcom,shikra-audiocore-csr
21*6ef11670SImran Shaik
22*6ef11670SImran Shaik  reg:
23*6ef11670SImran Shaik    maxItems: 1
24*6ef11670SImran Shaik
25*6ef11670SImran Shaik  '#reset-cells':
26*6ef11670SImran Shaik    const: 1
27*6ef11670SImran Shaik
28*6ef11670SImran Shaikrequired:
29*6ef11670SImran Shaik  - compatible
30*6ef11670SImran Shaik  - reg
31*6ef11670SImran Shaik  - '#reset-cells'
32*6ef11670SImran Shaik
33*6ef11670SImran ShaikadditionalProperties: false
34*6ef11670SImran Shaik
35*6ef11670SImran Shaikexamples:
36*6ef11670SImran Shaik  - |
37*6ef11670SImran Shaik    reset-controller@a0b4000 {
38*6ef11670SImran Shaik      compatible = "qcom,shikra-audiocore-csr";
39*6ef11670SImran Shaik      reg = <0x0a0b4000 0x1000>;
40*6ef11670SImran Shaik      #reset-cells = <1>;
41*6ef11670SImran Shaik    };
42*6ef11670SImran Shaik...
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