xref: /linux/Documentation/devicetree/bindings/reset/microchip,rst.yaml (revision 2cddfc2e8fc78c13b0f5286ea5dd48cdf527ad41) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/microchip,rst.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip Sparx5 Switch Reset Controller
8
9maintainers:
10  - Steen Hegelund <steen.hegelund@microchip.com>
11  - Lars Povlsen <lars.povlsen@microchip.com>
12
13description: |
14  The Microchip Sparx5 Switch provides reset control and implements the following
15  functions
16    - One Time Switch Core Reset (Soft Reset)
17
18properties:
19  $nodename:
20    pattern: "^reset-controller@[0-9a-f]+$"
21
22  compatible:
23    oneOf:
24      - enum:
25          - microchip,sparx5-switch-reset
26          - microchip,lan966x-switch-reset
27      - items:
28          - enum:
29              - microchip,lan9691-switch-reset
30          - const: microchip,lan966x-switch-reset
31
32  reg:
33    items:
34      - description: global control block registers
35
36  reg-names:
37    items:
38      - const: gcb
39
40  "#reset-cells":
41    const: 1
42
43  cpu-syscon:
44    $ref: /schemas/types.yaml#/definitions/phandle
45    description: syscon used to access CPU reset
46
47required:
48  - compatible
49  - reg
50  - reg-names
51  - "#reset-cells"
52  - cpu-syscon
53
54additionalProperties: false
55
56examples:
57  - |
58    reset: reset-controller@11010008 {
59        compatible = "microchip,sparx5-switch-reset";
60        reg = <0x11010008 0x4>;
61        reg-names = "gcb";
62        #reset-cells = <1>;
63        cpu-syscon = <&cpu_ctrl>;
64    };
65