120c1b699SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 220c1b699SAnson Huang%YAML 1.2 320c1b699SAnson Huang--- 420c1b699SAnson Huang$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml# 520c1b699SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 620c1b699SAnson Huang 720c1b699SAnson Huangtitle: Freescale i.MX System Reset Controller 820c1b699SAnson Huang 920c1b699SAnson Huangmaintainers: 1020c1b699SAnson Huang - Philipp Zabel <p.zabel@pengutronix.de> 1120c1b699SAnson Huang 1220c1b699SAnson Huangdescription: | 1320c1b699SAnson Huang The system reset controller can be used to reset the GPU, VPU, 1420c1b699SAnson Huang IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device 1520c1b699SAnson Huang nodes should specify the reset line on the SRC in their resets 1620c1b699SAnson Huang property, containing a phandle to the SRC device node and a 1720c1b699SAnson Huang RESET_INDEX specifying which module to reset, as described in 1820c1b699SAnson Huang reset.txt 1920c1b699SAnson Huang 2020c1b699SAnson Huang The following RESET_INDEX values are valid for i.MX5: 2120c1b699SAnson Huang GPU_RESET 0 2220c1b699SAnson Huang VPU_RESET 1 2320c1b699SAnson Huang IPU1_RESET 2 2420c1b699SAnson Huang OPEN_VG_RESET 3 2520c1b699SAnson Huang The following additional RESET_INDEX value is valid for i.MX6: 2620c1b699SAnson Huang IPU2_RESET 4 2720c1b699SAnson Huang 2820c1b699SAnson Huangproperties: 2920c1b699SAnson Huang compatible: 3020c1b699SAnson Huang oneOf: 31*e4916e79SRob Herring - const: fsl,imx51-src 3220c1b699SAnson Huang - items: 33*e4916e79SRob Herring - enum: 34*e4916e79SRob Herring - fsl,imx50-src 35*e4916e79SRob Herring - fsl,imx53-src 36*e4916e79SRob Herring - fsl,imx6q-src 37*e4916e79SRob Herring - fsl,imx6sx-src 38*e4916e79SRob Herring - fsl,imx6sl-src 39*e4916e79SRob Herring - fsl,imx6ul-src 40*e4916e79SRob Herring - fsl,imx6sll-src 41*e4916e79SRob Herring - const: fsl,imx51-src 4220c1b699SAnson Huang 4320c1b699SAnson Huang reg: 4420c1b699SAnson Huang maxItems: 1 4520c1b699SAnson Huang 4620c1b699SAnson Huang interrupts: 4720c1b699SAnson Huang items: 4820c1b699SAnson Huang - description: SRC interrupt 4920c1b699SAnson Huang - description: CPU WDOG interrupts out of SRC 5020c1b699SAnson Huang minItems: 1 5120c1b699SAnson Huang 5220c1b699SAnson Huang '#reset-cells': 5320c1b699SAnson Huang const: 1 5420c1b699SAnson Huang 5520c1b699SAnson Huangrequired: 5620c1b699SAnson Huang - compatible 5720c1b699SAnson Huang - reg 5820c1b699SAnson Huang - interrupts 5920c1b699SAnson Huang - '#reset-cells' 6020c1b699SAnson Huang 6120c1b699SAnson HuangadditionalProperties: false 6220c1b699SAnson Huang 6320c1b699SAnson Huangexamples: 6420c1b699SAnson Huang - | 6520c1b699SAnson Huang reset-controller@73fd0000 { 6620c1b699SAnson Huang compatible = "fsl,imx51-src"; 6720c1b699SAnson Huang reg = <0x73fd0000 0x4000>; 6820c1b699SAnson Huang interrupts = <75>; 6920c1b699SAnson Huang #reset-cells = <1>; 7020c1b699SAnson Huang }; 71