xref: /linux/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Altera SOCFPGA Reset Manager
8
9maintainers:
10  - Dinh Nguyen <dinguyen@altera.com>
11
12properties:
13  compatible:
14    oneOf:
15      - description: Cyclone5/Arria5/Arria10
16        const: altr,rst-mgr
17      - description: Stratix10 ARM64 SoC
18        items:
19          - const: altr,stratix10-rst-mgr
20          - const: altr,rst-mgr
21
22  reg:
23    maxItems: 1
24
25  altr,modrst-offset:
26    $ref: /schemas/types.yaml#/definitions/uint32
27    description: Offset of the first modrst register
28
29  '#reset-cells':
30    const: 1
31
32required:
33  - compatible
34  - reg
35  - altr,modrst-offset
36  - '#reset-cells'
37
38additionalProperties: false
39
40examples:
41  - |
42    rstmgr@ffd05000 {
43        compatible = "altr,rst-mgr";
44        reg = <0xffd05000 0x1000>;
45        altr,modrst-offset = <0x10>;
46        #reset-cells = <1>;
47    };
48