xref: /linux/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml (revision 1553a1c48281243359a9529a10ddb551f3b967ab) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Altera SOCFPGA Reset Manager
8
9maintainers:
10  - Dinh Nguyen <dinguyen@kernel.org>
11
12properties:
13  compatible:
14    oneOf:
15      - description: Cyclone5/Arria5/Arria10
16        const: altr,rst-mgr
17      - description: Stratix10 ARM64 SoC
18        items:
19          - const: altr,stratix10-rst-mgr
20          - const: altr,rst-mgr
21
22  reg:
23    maxItems: 1
24
25  altr,modrst-offset:
26    $ref: /schemas/types.yaml#/definitions/uint32
27    description: Offset of the first modrst register
28
29  '#reset-cells':
30    const: 1
31
32required:
33  - compatible
34  - reg
35  - '#reset-cells'
36
37if:
38  properties:
39    compatible:
40      contains:
41        const: altr,stratix10-rst-mgr
42then:
43  properties:
44    altr,modrst-offset: false
45
46additionalProperties: false
47
48examples:
49  - |
50    rstmgr@ffd05000 {
51        compatible = "altr,rst-mgr";
52        reg = <0xffd05000 0x1000>;
53        altr,modrst-offset = <0x10>;
54        #reset-cells = <1>;
55    };
56