xref: /linux/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml (revision dd3cb467ebb5659d6552999d6f16a616653f9933)

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A31 Peripheral Reset Controller

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

deprecated: true

select:
  properties:
    compatible:
      contains:
        enum:
          - allwinner,sun6i-a31-ahb1-reset
          - allwinner,sun6i-a31-clock-reset

  # The PRCM on the A31 and A23 will have the reg property missing,
  # since it's set at the upper level node, and will be validated by
  # PRCM's schema. Make sure we only validate standalone nodes.
  required:
    - compatible
    - reg

properties:
  "#reset-cells":
    const: 1
    description: >
      This additional argument passed to that reset controller is the
      offset of the bit controlling this particular reset line in the
      register.

  compatible:
    enum:
      - allwinner,sun6i-a31-ahb1-reset
      - allwinner,sun6i-a31-clock-reset

  reg:
    maxItems: 1

required:
  - "#reset-cells"
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    ahb1_rst: reset@1c202c0 {
        #reset-cells = <1>;
        compatible = "allwinner,sun6i-a31-ahb1-reset";
        reg = <0x01c202c0 0xc>;
    };

  - |
    apbs_rst: reset@80014b0 {
        #reset-cells = <1>;
        compatible = "allwinner,sun6i-a31-clock-reset";
        reg = <0x080014b0 0x4>;
    };

...