1# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: TI K3 DSP devices 8 9maintainers: 10 - Suman Anna <s-anna@ti.com> 11 12description: | 13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14 that are used to offload some of the processor-intensive tasks or algorithms, 15 for achieving various system level goals. 16 17 These processor sub-systems usually contain additional sub-modules like 18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 19 controller, a dedicated local power/sleep controller etc. The DSP processor 20 cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a 21 TMS320C71x CorePac processor. 22 23 Each DSP Core sub-system is represented as a single DT node. Each node has a 24 number of required or optional properties that enable the OS running on the 25 host processor (Arm CorePac) to perform the device management of the remote 26 processor and to communicate with the remote processor. 27 28allOf: 29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 30 31properties: 32 compatible: 33 enum: 34 - ti,j721e-c66-dsp 35 - ti,j721e-c71-dsp 36 - ti,j721s2-c71-dsp 37 description: 38 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs 39 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs 40 Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs 41 42 resets: 43 description: | 44 Should contain the phandle to the reset controller node managing the 45 local resets for this device, and a reset specifier. 46 maxItems: 1 47 48 firmware-name: 49 description: | 50 Should contain the name of the default firmware image 51 file located on the firmware search path 52 53 mboxes: 54 description: | 55 OMAP Mailbox specifier denoting the sub-mailbox, to be used for 56 communication with the remote processor. This property should match 57 with the sub-mailbox node used in the firmware image. 58 maxItems: 1 59 60 memory-region: 61 minItems: 2 62 maxItems: 8 63 description: | 64 phandle to the reserved memory nodes to be associated with the remoteproc 65 device. There should be at least two reserved memory nodes defined. The 66 reserved memory nodes should be carveout nodes, and should be defined as 67 per the bindings in 68 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 69 items: 70 - description: region used for dynamic DMA allocations like vrings and 71 vring buffers 72 - description: region reserved for firmware image sections 73 additionalItems: true 74 75# Optional properties: 76# -------------------- 77 78 sram: 79 $ref: /schemas/types.yaml#/definitions/phandle-array 80 minItems: 1 81 maxItems: 4 82 description: | 83 phandles to one or more reserved on-chip SRAM regions. The regions 84 should be defined as child nodes of the respective SRAM node, and 85 should be defined as per the generic bindings in, 86 Documentation/devicetree/bindings/sram/sram.yaml 87 88if: 89 properties: 90 compatible: 91 enum: 92 - ti,j721e-c66-dsp 93then: 94 properties: 95 reg: 96 items: 97 - description: Address and Size of the L2 SRAM internal memory region 98 - description: Address and Size of the L1 PRAM internal memory region 99 - description: Address and Size of the L1 DRAM internal memory region 100 reg-names: 101 items: 102 - const: l2sram 103 - const: l1pram 104 - const: l1dram 105else: 106 if: 107 properties: 108 compatible: 109 enum: 110 - ti,j721e-c71-dsp 111 - ti,j721s2-c71-dsp 112 then: 113 properties: 114 reg: 115 items: 116 - description: Address and Size of the L2 SRAM internal memory region 117 - description: Address and Size of the L1 DRAM internal memory region 118 reg-names: 119 items: 120 - const: l2sram 121 - const: l1dram 122 123required: 124 - compatible 125 - reg 126 - reg-names 127 - ti,sci 128 - ti,sci-dev-id 129 - ti,sci-proc-ids 130 - resets 131 - firmware-name 132 - mboxes 133 - memory-region 134 135unevaluatedProperties: false 136 137examples: 138 - | 139 soc { 140 #address-cells = <2>; 141 #size-cells = <2>; 142 143 bus@100000 { 144 compatible = "simple-bus"; 145 #address-cells = <2>; 146 #size-cells = <2>; 147 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ 148 <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */ 149 <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ 150 <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */ 151 152 /* J721E C66_0 DSP node */ 153 dsp@4d80800000 { 154 compatible = "ti,j721e-c66-dsp"; 155 reg = <0x4d 0x80800000 0x00 0x00048000>, 156 <0x4d 0x80e00000 0x00 0x00008000>, 157 <0x4d 0x80f00000 0x00 0x00008000>; 158 reg-names = "l2sram", "l1pram", "l1dram"; 159 ti,sci = <&dmsc>; 160 ti,sci-dev-id = <142>; 161 ti,sci-proc-ids = <0x03 0xFF>; 162 resets = <&k3_reset 142 1>; 163 firmware-name = "j7-c66_0-fw"; 164 memory-region = <&c66_0_dma_memory_region>, 165 <&c66_0_memory_region>; 166 mboxes = <&mailbox0_cluster3 &mbox_c66_0>; 167 }; 168 169 /* J721E C71_0 DSP node */ 170 c71_0: dsp@64800000 { 171 compatible = "ti,j721e-c71-dsp"; 172 reg = <0x00 0x64800000 0x00 0x00080000>, 173 <0x00 0x64e00000 0x00 0x0000c000>; 174 reg-names = "l2sram", "l1dram"; 175 ti,sci = <&dmsc>; 176 ti,sci-dev-id = <15>; 177 ti,sci-proc-ids = <0x30 0xFF>; 178 resets = <&k3_reset 15 1>; 179 firmware-name = "j7-c71_0-fw"; 180 memory-region = <&c71_0_dma_memory_region>, 181 <&c71_0_memory_region>; 182 mboxes = <&mailbox0_cluster4 &mbox_c71_0>; 183 }; 184 }; 185 }; 186