1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: TI K3 DSP devices 8 9maintainers: 10 - Suman Anna <s-anna@ti.com> 11 12description: | 13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14 that are used to offload some of the processor-intensive tasks or algorithms, 15 for achieving various system level goals. 16 17 These processor sub-systems usually contain additional sub-modules like 18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 19 controller, a dedicated local power/sleep controller etc. The DSP processor 20 cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a 21 TMS320C71x CorePac processor. 22 23 Each DSP Core sub-system is represented as a single DT node. Each node has a 24 number of required or optional properties that enable the OS running on the 25 host processor (Arm CorePac) to perform the device management of the remote 26 processor and to communicate with the remote processor. 27 28properties: 29 compatible: 30 enum: 31 - ti,am62a-c7xv-dsp 32 - ti,j721e-c66-dsp 33 - ti,j721e-c71-dsp 34 - ti,j721s2-c71-dsp 35 description: 36 Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs 37 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs 38 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs 39 Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs 40 41 resets: 42 description: | 43 Should contain the phandle to the reset controller node managing the 44 local resets for this device, and a reset specifier. 45 maxItems: 1 46 47 firmware-name: 48 description: | 49 Should contain the name of the default firmware image 50 file located on the firmware search path 51 52 mboxes: 53 description: | 54 OMAP Mailbox specifier denoting the sub-mailbox, to be used for 55 communication with the remote processor. This property should match 56 with the sub-mailbox node used in the firmware image. 57 maxItems: 1 58 59 memory-region: 60 minItems: 2 61 maxItems: 8 62 description: | 63 phandle to the reserved memory nodes to be associated with the remoteproc 64 device. There should be at least two reserved memory nodes defined. The 65 reserved memory nodes should be carveout nodes, and should be defined as 66 per the bindings in 67 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 68 items: 69 - description: region used for dynamic DMA allocations like vrings and 70 vring buffers 71 - description: region reserved for firmware image sections 72 additionalItems: true 73 74# Optional properties: 75# -------------------- 76 77 sram: 78 $ref: /schemas/types.yaml#/definitions/phandle-array 79 minItems: 1 80 maxItems: 4 81 items: 82 maxItems: 1 83 description: | 84 phandles to one or more reserved on-chip SRAM regions. The regions 85 should be defined as child nodes of the respective SRAM node, and 86 should be defined as per the generic bindings in, 87 Documentation/devicetree/bindings/sram/sram.yaml 88 89allOf: 90 - if: 91 properties: 92 compatible: 93 enum: 94 - ti,j721e-c66-dsp 95 then: 96 properties: 97 reg: 98 items: 99 - description: Address and Size of the L2 SRAM internal memory region 100 - description: Address and Size of the L1 PRAM internal memory region 101 - description: Address and Size of the L1 DRAM internal memory region 102 reg-names: 103 items: 104 - const: l2sram 105 - const: l1pram 106 - const: l1dram 107 108 - if: 109 properties: 110 compatible: 111 enum: 112 - ti,j721e-c71-dsp 113 - ti,j721s2-c71-dsp 114 then: 115 properties: 116 reg: 117 items: 118 - description: Address and Size of the L2 SRAM internal memory region 119 - description: Address and Size of the L1 DRAM internal memory region 120 reg-names: 121 items: 122 - const: l2sram 123 - const: l1dram 124 125 - if: 126 properties: 127 compatible: 128 enum: 129 - ti,am62a-c7xv-dsp 130 then: 131 properties: 132 reg: 133 items: 134 - description: Address and Size of the L2 SRAM internal memory region 135 reg-names: 136 items: 137 - const: l2sram 138 139 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 140 141required: 142 - compatible 143 - reg 144 - reg-names 145 - ti,sci 146 - ti,sci-dev-id 147 - ti,sci-proc-ids 148 - resets 149 - firmware-name 150 - mboxes 151 - memory-region 152 153unevaluatedProperties: false 154 155examples: 156 - | 157 soc { 158 #address-cells = <2>; 159 #size-cells = <2>; 160 161 mailbox0_cluster3: mailbox-0 { 162 #mbox-cells = <1>; 163 }; 164 165 mailbox0_cluster4: mailbox-1 { 166 #mbox-cells = <1>; 167 }; 168 169 bus@100000 { 170 compatible = "simple-bus"; 171 #address-cells = <2>; 172 #size-cells = <2>; 173 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ 174 <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */ 175 <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ 176 <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */ 177 178 /* J721E C66_0 DSP node */ 179 dsp@4d80800000 { 180 compatible = "ti,j721e-c66-dsp"; 181 reg = <0x4d 0x80800000 0x00 0x00048000>, 182 <0x4d 0x80e00000 0x00 0x00008000>, 183 <0x4d 0x80f00000 0x00 0x00008000>; 184 reg-names = "l2sram", "l1pram", "l1dram"; 185 ti,sci = <&dmsc>; 186 ti,sci-dev-id = <142>; 187 ti,sci-proc-ids = <0x03 0xFF>; 188 resets = <&k3_reset 142 1>; 189 firmware-name = "j7-c66_0-fw"; 190 memory-region = <&c66_0_dma_memory_region>, 191 <&c66_0_memory_region>; 192 mboxes = <&mailbox0_cluster3 &mbox_c66_0>; 193 }; 194 195 /* J721E C71_0 DSP node */ 196 c71_0: dsp@64800000 { 197 compatible = "ti,j721e-c71-dsp"; 198 reg = <0x00 0x64800000 0x00 0x00080000>, 199 <0x00 0x64e00000 0x00 0x0000c000>; 200 reg-names = "l2sram", "l1dram"; 201 ti,sci = <&dmsc>; 202 ti,sci-dev-id = <15>; 203 ti,sci-proc-ids = <0x30 0xFF>; 204 resets = <&k3_reset 15 1>; 205 firmware-name = "j7-c71_0-fw"; 206 memory-region = <&c71_0_dma_memory_region>, 207 <&c71_0_memory_region>; 208 mboxes = <&mailbox0_cluster4 &mbox_c71_0>; 209 }; 210 }; 211 }; 212