1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SM8550 Peripheral Authentication Service 8 9maintainers: 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 11 12description: 13 Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware 14 on the Qualcomm DSP Hexagon cores. 15 16properties: 17 compatible: 18 oneOf: 19 - enum: 20 - qcom,sdx75-mpss-pas 21 - qcom,sm8550-adsp-pas 22 - qcom,sm8550-cdsp-pas 23 - qcom,sm8550-mpss-pas 24 - qcom,sm8650-adsp-pas 25 - qcom,sm8650-cdsp-pas 26 - qcom,sm8650-mpss-pas 27 - qcom,x1e80100-adsp-pas 28 - qcom,x1e80100-cdsp-pas 29 - items: 30 - const: qcom,sm8750-adsp-pas 31 - const: qcom,sm8550-adsp-pas 32 33 reg: 34 maxItems: 1 35 36 clocks: 37 items: 38 - description: XO clock 39 40 clock-names: 41 items: 42 - const: xo 43 44 qcom,qmp: 45 $ref: /schemas/types.yaml#/definitions/phandle 46 description: Reference to the AOSS side-channel message RAM. 47 48 smd-edge: false 49 50 firmware-name: 51 $ref: /schemas/types.yaml#/definitions/string-array 52 items: 53 - description: Firmware name of the Hexagon core 54 - description: Firmware name of the Hexagon Devicetree 55 56 memory-region: 57 minItems: 2 58 items: 59 - description: Memory region for main Firmware authentication 60 - description: Memory region for Devicetree Firmware authentication 61 - description: DSM Memory region 62 - description: DSM Memory region 2 63 - description: Memory region for Qlink Logging 64 65required: 66 - compatible 67 - reg 68 - memory-region 69 70allOf: 71 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 72 - if: 73 properties: 74 compatible: 75 enum: 76 - qcom,sm8550-adsp-pas 77 - qcom,sm8550-cdsp-pas 78 - qcom,sm8650-adsp-pas 79 - qcom,x1e80100-adsp-pas 80 - qcom,x1e80100-cdsp-pas 81 then: 82 properties: 83 interrupts: 84 maxItems: 5 85 interrupt-names: 86 maxItems: 5 87 memory-region: 88 maxItems: 2 89 - if: 90 properties: 91 compatible: 92 contains: 93 enum: 94 - qcom,sm8750-adsp-pas 95 then: 96 properties: 97 interrupts: 98 maxItems: 6 99 interrupt-names: 100 maxItems: 6 101 memory-region: 102 maxItems: 2 103 - if: 104 properties: 105 compatible: 106 enum: 107 - qcom,sm8650-cdsp-pas 108 then: 109 properties: 110 interrupts: 111 maxItems: 5 112 interrupt-names: 113 maxItems: 5 114 memory-region: 115 minItems: 3 116 maxItems: 3 117 - if: 118 properties: 119 compatible: 120 enum: 121 - qcom,sm8550-mpss-pas 122 then: 123 properties: 124 interrupts: 125 minItems: 6 126 interrupt-names: 127 minItems: 6 128 memory-region: 129 minItems: 3 130 maxItems: 3 131 - if: 132 properties: 133 compatible: 134 enum: 135 - qcom,sdx75-mpss-pas 136 - qcom,sm8650-mpss-pas 137 then: 138 properties: 139 interrupts: 140 minItems: 6 141 interrupt-names: 142 minItems: 6 143 memory-region: 144 minItems: 5 145 maxItems: 5 146 147 - if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - qcom,sm8550-adsp-pas 153 - qcom,sm8650-adsp-pas 154 - qcom,sm8750-adsp-pas 155 - qcom,x1e80100-adsp-pas 156 then: 157 properties: 158 power-domains: 159 items: 160 - description: LCX power domain 161 - description: LMX power domain 162 power-domain-names: 163 items: 164 - const: lcx 165 - const: lmx 166 167 - if: 168 properties: 169 compatible: 170 enum: 171 - qcom,sdx75-mpss-pas 172 - qcom,sm8550-mpss-pas 173 - qcom,sm8650-mpss-pas 174 then: 175 properties: 176 power-domains: 177 items: 178 - description: CX power domain 179 - description: MSS power domain 180 power-domain-names: 181 items: 182 - const: cx 183 - const: mss 184 - if: 185 properties: 186 compatible: 187 enum: 188 - qcom,sm8550-cdsp-pas 189 - qcom,sm8650-cdsp-pas 190 - qcom,x1e80100-cdsp-pas 191 then: 192 properties: 193 power-domains: 194 items: 195 - description: CX power domain 196 - description: MXC power domain 197 - description: NSP power domain 198 power-domain-names: 199 items: 200 - const: cx 201 - const: mxc 202 - const: nsp 203 204unevaluatedProperties: false 205 206examples: 207 - | 208 #include <dt-bindings/clock/qcom,rpmh.h> 209 #include <dt-bindings/interrupt-controller/irq.h> 210 #include <dt-bindings/mailbox/qcom-ipcc.h> 211 212 remoteproc@30000000 { 213 compatible = "qcom,sm8550-adsp-pas"; 214 reg = <0x030000000 0x100>; 215 216 clocks = <&rpmhcc RPMH_CXO_CLK>; 217 clock-names = "xo"; 218 219 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, 220 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 221 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 222 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 223 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 224 interrupt-names = "wdog", "fatal", "ready", 225 "handover", "stop-ack"; 226 227 memory-region = <&adsp_mem>, <&dtb_adsp_mem>; 228 229 firmware-name = "qcom/sm8550/adsp.mbn", 230 "qcom/sm8550/adsp_dtb.mbn"; 231 232 power-domains = <&rpmhpd_sm8550_lcx>, 233 <&rpmhpd_sm8550_lmx>; 234 power-domain-names = "lcx", "lmx"; 235 236 qcom,qmp = <&aoss_qmp>; 237 qcom,smem-states = <&smp2p_adsp_out 0>; 238 qcom,smem-state-names = "stop"; 239 240 glink-edge { 241 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 242 IPCC_MPROC_SIGNAL_GLINK_QMP 243 IRQ_TYPE_EDGE_RISING>; 244 mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; 245 246 label = "lpass"; 247 qcom,remote-pid = <2>; 248 249 /* ... */ 250 }; 251 }; 252