xref: /linux/Documentation/devicetree/bindings/remoteproc/qcom,nord-pas.yaml (revision fc710de0dd25ed50a087833b4171eb1a46737a9e)
1*5b8a0dceSShawn Guo# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2*5b8a0dceSShawn Guo%YAML 1.2
3*5b8a0dceSShawn Guo---
4*5b8a0dceSShawn Guo$id: http://devicetree.org/schemas/remoteproc/qcom,nord-pas.yaml#
5*5b8a0dceSShawn Guo$schema: http://devicetree.org/meta-schemas/core.yaml#
6*5b8a0dceSShawn Guo
7*5b8a0dceSShawn Guotitle: Qualcomm Nord SoC Peripheral Authentication Service
8*5b8a0dceSShawn Guo
9*5b8a0dceSShawn Guomaintainers:
10*5b8a0dceSShawn Guo  - Shawn Guo <shengchao.guo@oss.qualcomm.com>
11*5b8a0dceSShawn Guo
12*5b8a0dceSShawn Guodescription:
13*5b8a0dceSShawn Guo  Qualcomm Nord SoC Peripheral Authentication Service loads and boots firmware
14*5b8a0dceSShawn Guo  on the Qualcomm DSP Hexagon cores.
15*5b8a0dceSShawn Guo
16*5b8a0dceSShawn Guoproperties:
17*5b8a0dceSShawn Guo  compatible:
18*5b8a0dceSShawn Guo    enum:
19*5b8a0dceSShawn Guo      - qcom,nord-adsp-pas
20*5b8a0dceSShawn Guo      - qcom,nord-cdsp0-pas
21*5b8a0dceSShawn Guo      - qcom,nord-cdsp1-pas
22*5b8a0dceSShawn Guo      - qcom,nord-cdsp2-pas
23*5b8a0dceSShawn Guo      - qcom,nord-cdsp3-pas
24*5b8a0dceSShawn Guo
25*5b8a0dceSShawn Guo  power-domains:
26*5b8a0dceSShawn Guo    minItems: 2
27*5b8a0dceSShawn Guo    items:
28*5b8a0dceSShawn Guo      - description: CX power domain
29*5b8a0dceSShawn Guo      - description: MX power domain
30*5b8a0dceSShawn Guo      - description: NSP power domain
31*5b8a0dceSShawn Guo
32*5b8a0dceSShawn Guo  power-domain-names:
33*5b8a0dceSShawn Guo    minItems: 2
34*5b8a0dceSShawn Guo    items:
35*5b8a0dceSShawn Guo      - const: cx
36*5b8a0dceSShawn Guo      - const: mx
37*5b8a0dceSShawn Guo      - const: nsp
38*5b8a0dceSShawn Guo
39*5b8a0dceSShawn Guo  reg:
40*5b8a0dceSShawn Guo    maxItems: 1
41*5b8a0dceSShawn Guo
42*5b8a0dceSShawn Guo  clocks:
43*5b8a0dceSShawn Guo    items:
44*5b8a0dceSShawn Guo      - description: XO clock
45*5b8a0dceSShawn Guo
46*5b8a0dceSShawn Guo  clock-names:
47*5b8a0dceSShawn Guo    items:
48*5b8a0dceSShawn Guo      - const: xo
49*5b8a0dceSShawn Guo
50*5b8a0dceSShawn Guo  qcom,qmp:
51*5b8a0dceSShawn Guo    $ref: /schemas/types.yaml#/definitions/phandle
52*5b8a0dceSShawn Guo    description: Reference to the AOSS side-channel message RAM.
53*5b8a0dceSShawn Guo
54*5b8a0dceSShawn Guo  smd-edge: false
55*5b8a0dceSShawn Guo
56*5b8a0dceSShawn Guo  firmware-name:
57*5b8a0dceSShawn Guo    items:
58*5b8a0dceSShawn Guo      - description: Firmware name of the Hexagon core
59*5b8a0dceSShawn Guo      - description: Firmware name of the Hexagon Devicetree
60*5b8a0dceSShawn Guo
61*5b8a0dceSShawn Guo  memory-region:
62*5b8a0dceSShawn Guo    items:
63*5b8a0dceSShawn Guo      - description: Memory region for main Firmware authentication
64*5b8a0dceSShawn Guo      - description: Memory region for Devicetree Firmware authentication
65*5b8a0dceSShawn Guo
66*5b8a0dceSShawn Guo  interrupts:
67*5b8a0dceSShawn Guo    items:
68*5b8a0dceSShawn Guo      - description: Watchdog interrupt
69*5b8a0dceSShawn Guo      - description: Fatal interrupt
70*5b8a0dceSShawn Guo      - description: Ready interrupt
71*5b8a0dceSShawn Guo      - description: Handover interrupt
72*5b8a0dceSShawn Guo      - description: Stop acknowledge interrupt
73*5b8a0dceSShawn Guo      - description: Shutdown acknowledge interrupt
74*5b8a0dceSShawn Guo
75*5b8a0dceSShawn Guo  interrupt-names:
76*5b8a0dceSShawn Guo    items:
77*5b8a0dceSShawn Guo      - const: wdog
78*5b8a0dceSShawn Guo      - const: fatal
79*5b8a0dceSShawn Guo      - const: ready
80*5b8a0dceSShawn Guo      - const: handover
81*5b8a0dceSShawn Guo      - const: stop-ack
82*5b8a0dceSShawn Guo      - const: shutdown-ack
83*5b8a0dceSShawn Guo
84*5b8a0dceSShawn Guo  qcom,smem-states:
85*5b8a0dceSShawn Guo    maxItems: 1
86*5b8a0dceSShawn Guo    description: States used by the AP to signal the Hexagon core
87*5b8a0dceSShawn Guo
88*5b8a0dceSShawn Guo  qcom,smem-state-names:
89*5b8a0dceSShawn Guo    maxItems: 1
90*5b8a0dceSShawn Guo    description: The names of the state bits used for SMP2P output
91*5b8a0dceSShawn Guo
92*5b8a0dceSShawn Guorequired:
93*5b8a0dceSShawn Guo  - compatible
94*5b8a0dceSShawn Guo  - reg
95*5b8a0dceSShawn Guo  - memory-region
96*5b8a0dceSShawn Guo
97*5b8a0dceSShawn GuoallOf:
98*5b8a0dceSShawn Guo  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
99*5b8a0dceSShawn Guo  - if:
100*5b8a0dceSShawn Guo      properties:
101*5b8a0dceSShawn Guo        compatible:
102*5b8a0dceSShawn Guo          enum:
103*5b8a0dceSShawn Guo            - qcom,nord-adsp-pas
104*5b8a0dceSShawn Guo    then:
105*5b8a0dceSShawn Guo      properties:
106*5b8a0dceSShawn Guo        power-domains:
107*5b8a0dceSShawn Guo          maxItems: 2
108*5b8a0dceSShawn Guo        power-domain-names:
109*5b8a0dceSShawn Guo          maxItems: 2
110*5b8a0dceSShawn Guo    else:
111*5b8a0dceSShawn Guo      properties:
112*5b8a0dceSShawn Guo        power-domains:
113*5b8a0dceSShawn Guo          minItems: 3
114*5b8a0dceSShawn Guo        power-domain-names:
115*5b8a0dceSShawn Guo          minItems: 3
116*5b8a0dceSShawn Guo
117*5b8a0dceSShawn GuounevaluatedProperties: false
118*5b8a0dceSShawn Guo
119*5b8a0dceSShawn Guoexamples:
120*5b8a0dceSShawn Guo  - |
121*5b8a0dceSShawn Guo    #include <dt-bindings/clock/qcom,rpmh.h>
122*5b8a0dceSShawn Guo    #include <dt-bindings/interrupt-controller/arm-gic.h>
123*5b8a0dceSShawn Guo    #include <dt-bindings/interrupt-controller/irq.h>
124*5b8a0dceSShawn Guo    #include <dt-bindings/mailbox/qcom-ipcc.h>
125*5b8a0dceSShawn Guo    #include <dt-bindings/power/qcom,rpmhpd.h>
126*5b8a0dceSShawn Guo    #define IPCC_MPROC_ADSP0
127*5b8a0dceSShawn Guo
128*5b8a0dceSShawn Guo    remoteproc@4c00000 {
129*5b8a0dceSShawn Guo        compatible = "qcom,nord-adsp-pas";
130*5b8a0dceSShawn Guo        reg = <0x04c00000 0x10000>;
131*5b8a0dceSShawn Guo
132*5b8a0dceSShawn Guo        clocks = <&rpmhcc RPMH_CXO_CLK>;
133*5b8a0dceSShawn Guo        clock-names = "xo";
134*5b8a0dceSShawn Guo
135*5b8a0dceSShawn Guo        interrupts-extended = <&intc GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
136*5b8a0dceSShawn Guo                              <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
137*5b8a0dceSShawn Guo                              <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
138*5b8a0dceSShawn Guo                              <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
139*5b8a0dceSShawn Guo                              <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
140*5b8a0dceSShawn Guo                              <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
141*5b8a0dceSShawn Guo        interrupt-names = "wdog",
142*5b8a0dceSShawn Guo                          "fatal",
143*5b8a0dceSShawn Guo                          "ready",
144*5b8a0dceSShawn Guo                          "handover",
145*5b8a0dceSShawn Guo                          "stop-ack",
146*5b8a0dceSShawn Guo                          "shutdown-ack";
147*5b8a0dceSShawn Guo
148*5b8a0dceSShawn Guo        memory-region = <&hpass_dsp0_mem>, <&hpass_dsp0_dtb_mem>;
149*5b8a0dceSShawn Guo
150*5b8a0dceSShawn Guo        firmware-name = "qcom/nord/adsp.mbn",
151*5b8a0dceSShawn Guo                        "qcom/nord/adsp_dtb.mbn";
152*5b8a0dceSShawn Guo
153*5b8a0dceSShawn Guo        power-domains = <&rpmhpd RPMHPD_CX>,
154*5b8a0dceSShawn Guo                        <&rpmhpd RPMHPD_MX>;
155*5b8a0dceSShawn Guo        power-domain-names = "cx",
156*5b8a0dceSShawn Guo                             "mx";
157*5b8a0dceSShawn Guo
158*5b8a0dceSShawn Guo        qcom,qmp = <&aoss_qmp>;
159*5b8a0dceSShawn Guo        qcom,smem-states = <&smp2p_adsp_out 0>;
160*5b8a0dceSShawn Guo        qcom,smem-state-names = "stop";
161*5b8a0dceSShawn Guo
162*5b8a0dceSShawn Guo        glink-edge {
163*5b8a0dceSShawn Guo            interrupts-extended = <&ipcc IPCC_MPROC_ADSP0
164*5b8a0dceSShawn Guo                                         IPCC_MPROC_SIGNAL_GLINK_QMP
165*5b8a0dceSShawn Guo                                         IRQ_TYPE_EDGE_RISING>;
166*5b8a0dceSShawn Guo            mboxes = <&ipcc IPCC_MPROC_ADSP0 IPCC_MPROC_SIGNAL_GLINK_QMP>;
167*5b8a0dceSShawn Guo
168*5b8a0dceSShawn Guo            label = "adsp";
169*5b8a0dceSShawn Guo            qcom,remote-pid = <2>;
170*5b8a0dceSShawn Guo
171*5b8a0dceSShawn Guo            /* ... */
172*5b8a0dceSShawn Guo        };
173*5b8a0dceSShawn Guo    };
174