xref: /linux/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml (revision 06a130e42a5bfc84795464bff023bff4c16f58c5) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/mtk,scp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek SCP
8
9maintainers:
10  - Tinghan Shen <tinghan.shen@mediatek.com>
11
12description:
13  This binding provides support for ARM Cortex M4 Co-processor found on some
14  Mediatek SoCs.
15
16properties:
17  compatible:
18    enum:
19      - mediatek,mt8183-scp
20      - mediatek,mt8186-scp
21      - mediatek,mt8188-scp
22      - mediatek,mt8188-scp-dual
23      - mediatek,mt8192-scp
24      - mediatek,mt8195-scp
25      - mediatek,mt8195-scp-dual
26
27  reg:
28    description:
29      Should contain the address ranges for memory regions SRAM, CFG, and,
30      on some platforms, L1TCM.
31    minItems: 2
32    maxItems: 3
33
34  reg-names:
35    minItems: 2
36    maxItems: 3
37
38  clocks:
39    description:
40      Clock for co-processor (see ../clock/clock-bindings.txt).
41      Required by mt8183 and mt8192.
42    maxItems: 1
43
44  clock-names:
45    const: main
46
47  interrupts:
48    maxItems: 1
49
50  firmware-name:
51    maxItems: 1
52    description:
53      If present, name (or relative path) of the file within the
54      firmware search path containing the firmware image used when
55      initializing SCP.
56
57  memory-region:
58    maxItems: 1
59
60  cros-ec-rpmsg:
61    $ref: /schemas/mfd/google,cros-ec.yaml
62    description:
63      This subnode represents the rpmsg device. The properties
64      of this node are defined by the individual bindings for
65      the rpmsg devices.
66
67    required:
68      - mediatek,rpmsg-name
69
70    unevaluatedProperties: false
71
72  '#address-cells':
73    const: 1
74
75  '#size-cells':
76    const: 1
77
78  ranges:
79    description:
80      Standard ranges definition providing address translations for
81      local SCP SRAM address spaces to bus addresses.
82
83patternProperties:
84  "^scp@[a-f0-9]+$":
85    type: object
86    description:
87      The MediaTek SCP integrated to SoC might be a multi-core version.
88      The other cores are represented as child nodes of the boot core.
89      There are some integration differences for the IP like the usage of
90      address translator for translating SoC bus addresses into address space
91      for the processor.
92
93      Each SCP core has own cache memory. The SRAM and L1TCM are shared by
94      cores. The power of cache, SRAM and L1TCM power should be enabled
95      before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
96      on different SoCs.
97
98      The SCP cores do not use an MMU, but has a set of registers to
99      control the translations between 32-bit CPU addresses into system bus
100      addresses. Cache and memory access settings are provided through a
101      Memory Protection Unit (MPU), programmable only from the SCP.
102
103    properties:
104      compatible:
105        enum:
106          - mediatek,scp-core
107
108      reg:
109        description: The base address and size of SRAM.
110        maxItems: 1
111
112      reg-names:
113        const: sram
114
115      interrupts:
116        maxItems: 1
117
118      firmware-name:
119        maxItems: 1
120        description:
121          If present, name (or relative path) of the file within the
122          firmware search path containing the firmware image used when
123          initializing sub cores of multi-core SCP.
124
125      memory-region:
126        maxItems: 1
127
128      cros-ec-rpmsg:
129        $ref: /schemas/mfd/google,cros-ec.yaml
130        description:
131          This subnode represents the rpmsg device. The properties
132          of this node are defined by the individual bindings for
133          the rpmsg devices.
134
135        required:
136          - mediatek,rpmsg-name
137
138        unevaluatedProperties: false
139
140    required:
141      - compatible
142      - reg
143      - reg-names
144
145    additionalProperties: false
146
147required:
148  - compatible
149  - reg
150  - reg-names
151
152allOf:
153  - if:
154      properties:
155        compatible:
156          enum:
157            - mediatek,mt8183-scp
158            - mediatek,mt8192-scp
159    then:
160      required:
161        - clocks
162        - clock-names
163
164  - if:
165      properties:
166        compatible:
167          enum:
168            - mediatek,mt8183-scp
169            - mediatek,mt8186-scp
170            - mediatek,mt8188-scp
171    then:
172      properties:
173        reg:
174          maxItems: 2
175        reg-names:
176          items:
177            - const: sram
178            - const: cfg
179  - if:
180      properties:
181        compatible:
182          enum:
183            - mediatek,mt8192-scp
184            - mediatek,mt8195-scp
185    then:
186      properties:
187        reg:
188          maxItems: 3
189        reg-names:
190          items:
191            - const: sram
192            - const: cfg
193            - const: l1tcm
194  - if:
195      properties:
196        compatible:
197          enum:
198            - mediatek,mt8188-scp-dual
199            - mediatek,mt8195-scp-dual
200    then:
201      properties:
202        reg:
203          maxItems: 2
204        reg-names:
205          items:
206            - const: cfg
207            - const: l1tcm
208
209additionalProperties: false
210
211examples:
212  - |
213    #include <dt-bindings/clock/mt8192-clk.h>
214
215    scp@10500000 {
216        compatible = "mediatek,mt8192-scp";
217        reg = <0x10500000 0x80000>,
218              <0x10700000 0x8000>,
219              <0x10720000 0xe0000>;
220        reg-names = "sram", "cfg", "l1tcm";
221        clocks = <&infracfg CLK_INFRA_SCPSYS>;
222        clock-names = "main";
223
224        cros-ec-rpmsg {
225            compatible = "google,cros-ec-rpmsg";
226            mediatek,rpmsg-name = "cros-ec-rpmsg";
227        };
228    };
229
230  - |
231    scp@10500000 {
232        compatible = "mediatek,mt8195-scp-dual";
233        reg = <0x10720000 0xe0000>,
234              <0x10700000 0x8000>;
235        reg-names = "cfg", "l1tcm";
236
237        #address-cells = <1>;
238        #size-cells = <1>;
239        ranges = <0 0x10500000 0x100000>;
240
241        scp@0 {
242            compatible = "mediatek,scp-core";
243            reg = <0x0 0xa0000>;
244            reg-names = "sram";
245
246            cros-ec-rpmsg {
247                compatible = "google,cros-ec-rpmsg";
248                mediatek,rpmsg-name = "cros-ec-rpmsg";
249            };
250        };
251
252        scp@a0000 {
253            compatible = "mediatek,scp-core";
254            reg = <0xa0000 0x20000>;
255            reg-names = "sram";
256
257            cros-ec-rpmsg {
258                compatible = "google,cros-ec-rpmsg";
259                mediatek,rpmsg-name = "cros-ec-rpmsg";
260            };
261        };
262    };
263