1Adaptive Body Bias(ABB) SoC internal LDO regulator for Texas Instruments SoCs 2 3Required Properties: 4- compatible: Should be one of: 5 - "ti,abb-v1" for older SoCs like OMAP3 6 - "ti,abb-v2" for newer SoCs like OMAP4, OMAP5 7- reg: Address and length of the register set for the device. It contains 8 the information of registers in the same order as described by reg-names 9- reg-names: Should contain the reg names 10 - "base-address" - contains base address of ABB module 11 - "int-address" - contains address of interrupt register for ABB module 12 (also see Optional properties) 13- #address-cell: should be 0 14- #size-cell: should be 0 15- clocks: should point to the clock node used by ABB module 16- ti,settling-time: Settling time in uSecs from SoC documentation for ABB module 17 to settle down(target time for SR2_WTCNT_VALUE). 18- ti,clock-cycles: SoC specific data about count of system ti,clock-cycles used for 19 computing settling time from SoC Documentation for ABB module(clock 20 cycles for SR2_WTCNT_VALUE). 21- ti,tranxdone-status-mask: Mask to the int-register to write-to-clear mask 22 indicating LDO tranxdone (operation complete). 23- ti,abb_info: An array of 6-tuples u32 items providing information about ABB 24 configuration needed per operational voltage of the device. 25 Each item consists of the following in the same order: 26 volt: voltage in uV - Only used to index ABB information. 27 ABB mode: one of the following: 28 0-bypass 29 1-Forward Body Bias(FBB) 30 3-Reverse Body Bias(RBB) 31 efuse: (see Optional properties) 32 RBB enable efuse Mask: (See Optional properties) 33 FBB enable efuse Mask: (See Optional properties) 34 Vset value efuse Mask: (See Optional properties) 35 36 NOTE: If more than 1 entry is present, then regulator is setup to change 37 voltage, allowing for various modes to be selected indexed off 38 the regulator. Further, ABB LDOs are considered always-on by 39 default. 40 41Optional Properties: 42- reg-names: In addition to the required properties, the following are optional 43 - "efuse-address" - Contains efuse base address used to pick up ABB info. 44 - "ldo-address" - Contains address of ABB LDO overide register address. 45 "efuse-address" is required for this. 46- ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override 47 register to provide override vset value. 48- ti,ldovbb-override-mask - Required if ldo-address is set, mask for LDO 49 override register to enable override vset value. 50- ti,abb_opp_sel: Addendum to the description in required properties 51 efuse: Mandatory if 'efuse-address' register is defined. Provides offset 52 from efuse-address to pick up ABB characteristics. Set to 0 if 53 'efuse-address' is not defined. 54 RBB enable efuse Mask: Optional if 'efuse-address' register is defined. 55 'ABB mode' is force set to RBB mode if value at "efuse-address" 56 + efuse maps to RBB mask. Set to 0 to ignore this. 57 FBB enable efuse Mask: Optional if 'efuse-address' register is defined. 58 'ABB mode' is force set to FBB mode if value at "efuse-address" 59 + efuse maps to FBB mask (valid only if RBB mask does not match) 60 Set to 0 to ignore this. 61 Vset value efuse Mask: Mandatory if ldo-address is set. Picks up from 62 efuse the value to set in 'ti,ldovbb-vset-mask' at ldo-address. 63 64Example #1: Simplest configuration (no efuse data, hard coded ABB table): 65abb_x: regulator-abb-x { 66 compatible = "ti,abb-v1"; 67 regulator-name = "abb_x"; 68 #address-cell = <0>; 69 #size-cells = <0>; 70 reg = <0x483072f0 0x8>, <0x48306818 0x4>; 71 reg-names = "base-address", "int-address"; 72 ti,tranxdone-status-mask = <0x4000000>; 73 clocks = <&sysclk>; 74 ti,settling-time = <30>; 75 ti,clock-cycles = <8>; 76 ti,abb_info = < 77 /* uV ABB efuse rbb_m fbb_m vset_m */ 78 1012500 0 0 0 0 0 /* Bypass */ 79 1200000 3 0 0 0 0 /* RBB mandatory */ 80 1320000 1 0 0 0 0 /* FBB mandatory */ 81 >; 82}; 83 84Example #2: Efuse bits contain ABB mode setting (no LDO override capability) 85abb_y: regulator-abb-y { 86 compatible = "ti,abb-v2"; 87 regulator-name = "abb_y"; 88 #address-cell = <0>; 89 #size-cells = <0>; 90 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>, <0x4A002268 0x8>; 91 reg-names = "base-address", "int-address", "efuse-address"; 92 ti,tranxdone-status-mask = <0x4000000>; 93 clocks = <&sysclk>; 94 ti,settling-time = <50>; 95 ti,clock-cycles = <16>; 96 ti,abb_info = < 97 /* uV ABB efuse rbb_m fbb_m vset_m */ 98 975000 0 0 0 0 0 /* Bypass */ 99 1012500 0 0 0x40000 0 0 /* RBB optional */ 100 1200000 0 0x4 0 0x40000 0 /* FBB optional */ 101 1320000 1 0 0 0 0 /* FBB mandatory */ 102 >; 103}; 104 105Example #3: Efuse bits contain ABB mode setting and LDO override capability 106abb_z: regulator-abb-z { 107 compatible = "ti,abb-v2"; 108 regulator-name = "abb_z"; 109 #address-cell = <0>; 110 #size-cells = <0>; 111 reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>, 112 <0x4a002194 0x8>, <0x4ae0C314 0x4>; 113 reg-names = "base-address", "int-address", 114 "efuse-address", "ldo-address"; 115 ti,tranxdone-status-mask = <0x8000000>; 116 /* LDOVBBMM_MUX_CTRL */ 117 ti,ldovbb-override-mask = <0x400>; 118 /* LDOVBBMM_VSET_OUT */ 119 ti,ldovbb-vset-mask = <0x1F>; 120 clocks = <&sysclk>; 121 ti,settling-time = <50>; 122 ti,clock-cycles = <16>; 123 ti,abb_info = < 124 /* uV ABB efuse rbb_m fbb_m vset_m */ 125 975000 0 0 0 0 0 /* Bypass */ 126 1200000 0 0x4 0 0x40000 0x1f00 /* FBB optional, vset */ 127 >; 128}; 129