1*05a0fe8eSJoan Na# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*05a0fe8eSJoan Na%YAML 1.2 3*05a0fe8eSJoan Na--- 4*05a0fe8eSJoan Na$id: http://devicetree.org/schemas/regulator/adi,max77675.yaml# 5*05a0fe8eSJoan Na$schema: http://devicetree.org/meta-schemas/core.yaml# 6*05a0fe8eSJoan Na 7*05a0fe8eSJoan Natitle: Maxim MAX77675 PMIC Regulator 8*05a0fe8eSJoan Na 9*05a0fe8eSJoan Namaintainers: 10*05a0fe8eSJoan Na - Joan Na <joan.na@analog.com> 11*05a0fe8eSJoan Na 12*05a0fe8eSJoan Nadescription: 13*05a0fe8eSJoan Na The MAX77675 is a Power Management IC providing four switching buck 14*05a0fe8eSJoan Na regulators (SBB0–SBB3) accessible via I2C. It supports configuration 15*05a0fe8eSJoan Na of output voltages and enable controls for each regulator. 16*05a0fe8eSJoan Na 17*05a0fe8eSJoan NaallOf: 18*05a0fe8eSJoan Na - $ref: /schemas/input/input.yaml 19*05a0fe8eSJoan Na - $ref: /schemas/pinctrl/pincfg-node.yaml 20*05a0fe8eSJoan Na 21*05a0fe8eSJoan Naproperties: 22*05a0fe8eSJoan Na compatible: 23*05a0fe8eSJoan Na const: adi,max77675 24*05a0fe8eSJoan Na 25*05a0fe8eSJoan Na reg: 26*05a0fe8eSJoan Na maxItems: 1 27*05a0fe8eSJoan Na 28*05a0fe8eSJoan Na reset-time-sec: 29*05a0fe8eSJoan Na description: Manual reset time in seconds 30*05a0fe8eSJoan Na enum: [4, 8, 12, 16] 31*05a0fe8eSJoan Na default: 4 32*05a0fe8eSJoan Na 33*05a0fe8eSJoan Na bias-disable: 34*05a0fe8eSJoan Na type: boolean 35*05a0fe8eSJoan Na description: Disable internal pull-up for EN pin 36*05a0fe8eSJoan Na 37*05a0fe8eSJoan Na input-debounce: 38*05a0fe8eSJoan Na description: Debounce time for the enable pin, in microseconds 39*05a0fe8eSJoan Na items: 40*05a0fe8eSJoan Na - enum: [100, 30000] 41*05a0fe8eSJoan Na default: 100 42*05a0fe8eSJoan Na 43*05a0fe8eSJoan Na adi,en-mode: 44*05a0fe8eSJoan Na description: | 45*05a0fe8eSJoan Na Enable mode configuration. 46*05a0fe8eSJoan Na The debounce time set by 'input-debounce' applies to 47*05a0fe8eSJoan Na both push-button and slide-switch modes. 48*05a0fe8eSJoan Na "push-button" - A long press triggers power-on or power-down 49*05a0fe8eSJoan Na "slide-switch" - Low : powers on, High : powers down 50*05a0fe8eSJoan Na "logic" - Low : powers on, High : powers down (no debounce time) 51*05a0fe8eSJoan Na $ref: /schemas/types.yaml#/definitions/string 52*05a0fe8eSJoan Na enum: [push-button, slide-switch, logic] 53*05a0fe8eSJoan Na default: slide-switch 54*05a0fe8eSJoan Na 55*05a0fe8eSJoan Na adi,voltage-change-latency-us: 56*05a0fe8eSJoan Na description: 57*05a0fe8eSJoan Na Specifies the delay (in microseconds) between an output voltage change 58*05a0fe8eSJoan Na request and the start of the SBB voltage ramp. 59*05a0fe8eSJoan Na enum: [10, 100] 60*05a0fe8eSJoan Na default: 100 61*05a0fe8eSJoan Na 62*05a0fe8eSJoan Na adi,drv-sbb-strength: 63*05a0fe8eSJoan Na description: | 64*05a0fe8eSJoan Na SIMO Buck-Boost Drive Strength Trim. 65*05a0fe8eSJoan Na Controls the drive strength of the SIMO regulator's power MOSFETs. 66*05a0fe8eSJoan Na This setting affects switching speed, impacting power efficiency and EMI. 67*05a0fe8eSJoan Na "max" – Maximum drive strength (~0.6 ns transition time) 68*05a0fe8eSJoan Na "high" – High drive strength (~1.2 ns transition time) 69*05a0fe8eSJoan Na "low" – Low drive strength (~1.8 ns transition time) 70*05a0fe8eSJoan Na "min" – Minimum drive strength (~8 ns transition time) 71*05a0fe8eSJoan Na $ref: /schemas/types.yaml#/definitions/string 72*05a0fe8eSJoan Na enum: [max, high, low, min] 73*05a0fe8eSJoan Na default: max 74*05a0fe8eSJoan Na 75*05a0fe8eSJoan Na adi,dvs-slew-rate-mv-per-us: 76*05a0fe8eSJoan Na description: 77*05a0fe8eSJoan Na Dynamic rising slew rate for output voltage transitions, in mV/μs. 78*05a0fe8eSJoan Na This setting is only used when 'adi,fixed-slew-rate' is not present. 79*05a0fe8eSJoan Na enum: [5, 10] 80*05a0fe8eSJoan Na default: 5 81*05a0fe8eSJoan Na 82*05a0fe8eSJoan Na adi,bias-low-power-request: 83*05a0fe8eSJoan Na type: boolean 84*05a0fe8eSJoan Na description: Request low-power bias mode 85*05a0fe8eSJoan Na 86*05a0fe8eSJoan Na adi,simo-ldo-always-on: 87*05a0fe8eSJoan Na type: boolean 88*05a0fe8eSJoan Na description: Set internal LDO to always supply 1.8V 89*05a0fe8eSJoan Na 90*05a0fe8eSJoan Na regulators: 91*05a0fe8eSJoan Na type: object 92*05a0fe8eSJoan Na description: Regulator child nodes 93*05a0fe8eSJoan Na patternProperties: 94*05a0fe8eSJoan Na "^sbb[0-3]$": 95*05a0fe8eSJoan Na type: object 96*05a0fe8eSJoan Na $ref: regulator.yaml# 97*05a0fe8eSJoan Na properties: 98*05a0fe8eSJoan Na adi,fps-slot: 99*05a0fe8eSJoan Na description: | 100*05a0fe8eSJoan Na FPS (Flexible Power Sequencer) slot selection. 101*05a0fe8eSJoan Na The Flexible Power Sequencer allows resources to power up under 102*05a0fe8eSJoan Na hardware or software control. Additionally, each resource can 103*05a0fe8eSJoan Na power up independently or among a group of other regulators with 104*05a0fe8eSJoan Na adjustable power-up and power-down slots. 105*05a0fe8eSJoan Na "slot0" - Assign to FPS Slot 0 106*05a0fe8eSJoan Na "slot1" - Assign to FPS Slot 1 107*05a0fe8eSJoan Na "slot2" - Assign to FPS Slot 2 108*05a0fe8eSJoan Na "slot3" - Assign to FPS Slot 3 109*05a0fe8eSJoan Na "default" - Use the default FPS slot value stored in register 110*05a0fe8eSJoan Na $ref: /schemas/types.yaml#/definitions/string 111*05a0fe8eSJoan Na enum: [slot0, slot1, slot2, slot3, default] 112*05a0fe8eSJoan Na default: default 113*05a0fe8eSJoan Na 114*05a0fe8eSJoan Na adi,fixed-slew-rate: 115*05a0fe8eSJoan Na type: boolean 116*05a0fe8eSJoan Na description: 117*05a0fe8eSJoan Na When this property is present, the device uses a constant 2 mV/μs 118*05a0fe8eSJoan Na slew rate and ignores any dynamic slew rate configuration. 119*05a0fe8eSJoan Na When absent, the device uses the dynamic slew rate specified 120*05a0fe8eSJoan Na by 'adi,dvs-slew-rate-mv-per-us' 121*05a0fe8eSJoan Na 122*05a0fe8eSJoan Na unevaluatedProperties: false 123*05a0fe8eSJoan Na 124*05a0fe8eSJoan Narequired: 125*05a0fe8eSJoan Na - compatible 126*05a0fe8eSJoan Na - reg 127*05a0fe8eSJoan Na - regulators 128*05a0fe8eSJoan Na 129*05a0fe8eSJoan NaadditionalProperties: false 130*05a0fe8eSJoan Na 131*05a0fe8eSJoan Naexamples: 132*05a0fe8eSJoan Na - | 133*05a0fe8eSJoan Na i2c { 134*05a0fe8eSJoan Na #address-cells = <1>; 135*05a0fe8eSJoan Na #size-cells = <0>; 136*05a0fe8eSJoan Na 137*05a0fe8eSJoan Na max77675: pmic@44 { 138*05a0fe8eSJoan Na compatible = "adi,max77675"; 139*05a0fe8eSJoan Na reg = <0x44>; 140*05a0fe8eSJoan Na 141*05a0fe8eSJoan Na reset-time-sec = <4>; 142*05a0fe8eSJoan Na input-debounce = <100>; 143*05a0fe8eSJoan Na 144*05a0fe8eSJoan Na adi,en-mode = "slide-switch"; 145*05a0fe8eSJoan Na adi,voltage-change-latency-us = <100>; 146*05a0fe8eSJoan Na adi,drv-sbb-strength = "max"; 147*05a0fe8eSJoan Na adi,dvs-slew-rate-mv-per-us = <5>; 148*05a0fe8eSJoan Na 149*05a0fe8eSJoan Na regulators { 150*05a0fe8eSJoan Na sbb0: sbb0 { 151*05a0fe8eSJoan Na regulator-name = "sbb0"; 152*05a0fe8eSJoan Na regulator-min-microvolt = <500000>; 153*05a0fe8eSJoan Na regulator-max-microvolt = <5500000>; 154*05a0fe8eSJoan Na adi,fps-slot = "default"; 155*05a0fe8eSJoan Na adi,fixed-slew-rate; 156*05a0fe8eSJoan Na }; 157*05a0fe8eSJoan Na 158*05a0fe8eSJoan Na sbb1: sbb1 { 159*05a0fe8eSJoan Na regulator-name = "sbb1"; 160*05a0fe8eSJoan Na regulator-min-microvolt = <500000>; 161*05a0fe8eSJoan Na regulator-max-microvolt = <5500000>; 162*05a0fe8eSJoan Na adi,fps-slot = "default"; 163*05a0fe8eSJoan Na adi,fixed-slew-rate; 164*05a0fe8eSJoan Na }; 165*05a0fe8eSJoan Na 166*05a0fe8eSJoan Na sbb2: sbb2 { 167*05a0fe8eSJoan Na regulator-name = "sbb2"; 168*05a0fe8eSJoan Na regulator-min-microvolt = <500000>; 169*05a0fe8eSJoan Na regulator-max-microvolt = <5500000>; 170*05a0fe8eSJoan Na adi,fps-slot = "default"; 171*05a0fe8eSJoan Na adi,fixed-slew-rate; 172*05a0fe8eSJoan Na }; 173*05a0fe8eSJoan Na 174*05a0fe8eSJoan Na sbb3: sbb3 { 175*05a0fe8eSJoan Na regulator-name = "sbb3"; 176*05a0fe8eSJoan Na regulator-min-microvolt = <500000>; 177*05a0fe8eSJoan Na regulator-max-microvolt = <5500000>; 178*05a0fe8eSJoan Na adi,fps-slot = "default"; 179*05a0fe8eSJoan Na adi,fixed-slew-rate; 180*05a0fe8eSJoan Na }; 181*05a0fe8eSJoan Na }; 182*05a0fe8eSJoan Na }; 183*05a0fe8eSJoan Na }; 184*05a0fe8eSJoan Na 185