xref: /linux/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml (revision d12f68b5ba08e8b4527532fa8a61c404c9832842) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Spreadtrum/Unisoc UMS512 PWM Controller
8
9maintainers:
10  - Orson Zhai <orsonzhai@gmail.com>
11  - Baolin Wang <baolin.wang@linux.alibaba.com>
12  - Chunyan Zhang <zhang.lyra@gmail.com>
13
14properties:
15  compatible:
16    const: sprd,ums512-pwm
17
18  reg:
19    maxItems: 1
20
21  clocks:
22    maxItems: 8
23
24  clock-names:
25    items:
26      - const: pwm0
27      - const: enable0
28      - const: pwm1
29      - const: enable1
30      - const: pwm2
31      - const: enable2
32      - const: pwm3
33      - const: enable3
34
35  '#pwm-cells':
36    const: 2
37
38required:
39  - compatible
40  - reg
41  - clocks
42  - clock-names
43
44allOf:
45  - $ref: pwm.yaml#
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/clock/sprd,ums512-clk.h>
52
53    pwm@32260000 {
54      compatible = "sprd,ums512-pwm";
55      reg = <0x32260000 0x10000>;
56      clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
57               <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
58               <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
59               <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
60      clock-names = "pwm0", "enable0",
61                    "pwm1", "enable1",
62                    "pwm2", "enable2",
63                    "pwm3", "enable3";
64      #pwm-cells = <2>;
65    };
66...
67