xref: /linux/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml (revision 6fdcba32711044c35c0e1b094cbd8f3f0b4472c9) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung SoC PWM timers
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Krzysztof Kozlowski <krzk@kernel.org>
12
13description: |+
14  Samsung SoCs contain PWM timer blocks which can be used for system clock source
15  and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16  PWM timer block provides 5 PWM channels (not all of them can drive physical
17  outputs - see SoC and board manual).
18
19  Be aware that the clocksource driver supports only uniprocessor systems.
20
21allOf:
22  - $ref: pwm.yaml#
23
24properties:
25  compatible:
26    enum:
27      - samsung,s3c2410-pwm             # 16-bit, S3C24xx
28      - samsung,s3c6400-pwm             # 32-bit, S3C64xx
29      - samsung,s5p6440-pwm             # 32-bit, S5P64x0
30      - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
31      - samsung,exynos4210-pwm          # 32-bit, Exynos
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    minItems: 1
38    maxItems: 3
39
40  clock-names:
41    description: |
42      Should contain all following required clock names:
43      - "timers" - PWM base clock used to generate PWM signals,
44      and any subset of following optional clock names:
45      - "pwm-tclk0" - first external PWM clock source,
46      - "pwm-tclk1" - second external PWM clock source.
47      Note that not all IP variants allow using all external clock sources.
48      Refer to SoC documentation to learn which clock source configurations
49      are available.
50    oneOf:
51      - items:
52        - const: timers
53      - items:
54        - const: timers
55        - const: pwm-tclk0
56      - items:
57        - const: timers
58        - const: pwm-tclk1
59      - items:
60        - const: timers
61        - const: pwm-tclk0
62        - const: pwm-tclk1
63
64  interrupts:
65    description:
66      One interrupt per timer, starting at timer 0.
67    minItems: 1
68    maxItems: 5
69
70  "#pwm-cells":
71    description:
72      The only third cell flag supported by this binding
73      is PWM_POLARITY_INVERTED.
74    const: 3
75
76  samsung,pwm-outputs:
77    description:
78      A list of PWM channels used as PWM outputs on particular platform.
79      It is an array of up to 5 elements being indices of PWM channels
80      (from 0 to 4), the order does not matter.
81    allOf:
82      - $ref: /schemas/types.yaml#/definitions/uint32-array
83      - uniqueItems: true
84      - items:
85          minimum: 0
86          maximum: 4
87
88required:
89  - clocks
90  - clock-names
91  - compatible
92  - interrupts
93  - "#pwm-cells"
94  - reg
95
96additionalProperties: false
97
98examples:
99  - |
100    pwm@7f006000 {
101        compatible = "samsung,s3c6400-pwm";
102        reg = <0x7f006000 0x1000>;
103        interrupt-parent = <&vic0>;
104        interrupts = <23>, <24>, <25>, <27>, <28>;
105        clocks = <&clock 67>;
106        clock-names = "timers";
107        samsung,pwm-outputs = <0>, <1>;
108        #pwm-cells = <3>;
109    };
110