xref: /linux/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml (revision 34f7c6e7d4396090692a09789db231e12cb4762b) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung SoC PWM timers
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Krzysztof Kozlowski <krzk@kernel.org>
12
13description: |+
14  Samsung SoCs contain PWM timer blocks which can be used for system clock source
15  and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16  PWM timer block provides 5 PWM channels (not all of them can drive physical
17  outputs - see SoC and board manual).
18
19  Be aware that the clocksource driver supports only uniprocessor systems.
20
21properties:
22  compatible:
23    enum:
24      - samsung,s3c2410-pwm             # 16-bit, S3C24xx
25      - samsung,s3c6400-pwm             # 32-bit, S3C64xx
26      - samsung,s5p6440-pwm             # 32-bit, S5P64x0
27      - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
28      - samsung,exynos4210-pwm          # 32-bit, Exynos
29
30  reg:
31    maxItems: 1
32
33  clocks:
34    minItems: 1
35    maxItems: 3
36
37  clock-names:
38    description: |
39      Should contain all following required clock names:
40      - "timers" - PWM base clock used to generate PWM signals,
41      and any subset of following optional clock names:
42      - "pwm-tclk0" - first external PWM clock source,
43      - "pwm-tclk1" - second external PWM clock source.
44      Note that not all IP variants allow using all external clock sources.
45      Refer to SoC documentation to learn which clock source configurations
46      are available.
47    oneOf:
48      - items:
49          - const: timers
50      - items:
51          - const: timers
52          - const: pwm-tclk0
53      - items:
54          - const: timers
55          - const: pwm-tclk1
56      - items:
57          - const: timers
58          - const: pwm-tclk0
59          - const: pwm-tclk1
60
61  interrupts:
62    description:
63      One interrupt per timer, starting at timer 0. Necessary only for SoCs which
64      use PWM clocksource.
65    minItems: 1
66    maxItems: 5
67
68  "#pwm-cells":
69    description:
70      The only third cell flag supported by this binding
71      is PWM_POLARITY_INVERTED.
72    const: 3
73
74  samsung,pwm-outputs:
75    description:
76      A list of PWM channels used as PWM outputs on particular platform.
77      It is an array of up to 5 elements being indices of PWM channels
78      (from 0 to 4), the order does not matter.
79    $ref: /schemas/types.yaml#/definitions/uint32-array
80    uniqueItems: true
81    items:
82      minimum: 0
83      maximum: 4
84
85required:
86  - clocks
87  - clock-names
88  - compatible
89  - reg
90
91additionalProperties: false
92
93allOf:
94  - $ref: pwm.yaml#
95
96  - if:
97      properties:
98        compatible:
99          contains:
100            enum:
101              - samsung,s3c2410-pwm
102              - samsung,s3c6400-pwm
103              - samsung,s5p6440-pwm
104              - samsung,s5pc100-pwm
105    then:
106      required:
107        - interrupts
108
109examples:
110  - |
111    pwm@7f006000 {
112        compatible = "samsung,s3c6400-pwm";
113        reg = <0x7f006000 0x1000>;
114        interrupt-parent = <&vic0>;
115        interrupts = <23>, <24>, <25>, <27>, <28>;
116        clocks = <&clock 67>;
117        clock-names = "timers";
118        samsung,pwm-outputs = <0>, <1>;
119        #pwm-cells = <3>;
120    };
121