xref: /linux/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml (revision c4b5140c6eac2f757d9706c6c783b60554c48cb7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek DISP_PWM Controller
8
9maintainers:
10  - Jitao Shi <jitao.shi@mediatek.com>
11  - Xinlei Lee <xinlei.lee@mediatek.com>
12
13allOf:
14  - $ref: pwm.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - mediatek,mt2701-disp-pwm
21          - mediatek,mt6595-disp-pwm
22          - mediatek,mt8173-disp-pwm
23          - mediatek,mt8183-disp-pwm
24      - items:
25          - enum:
26              - mediatek,mt6795-disp-pwm
27              - mediatek,mt8167-disp-pwm
28          - const: mediatek,mt8173-disp-pwm
29      - items:
30          - enum:
31              - mediatek,mt8186-disp-pwm
32              - mediatek,mt8188-disp-pwm
33              - mediatek,mt8192-disp-pwm
34              - mediatek,mt8195-disp-pwm
35          - const: mediatek,mt8183-disp-pwm
36
37  reg:
38    maxItems: 1
39
40  "#pwm-cells":
41    const: 2
42
43  interrupts:
44    maxItems: 1
45
46  clocks:
47    items:
48      - description: Main Clock
49      - description: Mm Clock
50
51  clock-names:
52    items:
53      - const: main
54      - const: mm
55
56required:
57  - compatible
58  - reg
59  - "#pwm-cells"
60  - clocks
61  - clock-names
62
63additionalProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68    #include <dt-bindings/clock/mt8173-clk.h>
69    #include <dt-bindings/interrupt-controller/irq.h>
70
71    pwm0: pwm@1401e000 {
72        compatible = "mediatek,mt8173-disp-pwm";
73        reg = <0x1401e000 0x1000>;
74        #pwm-cells = <2>;
75        clocks = <&mmsys CLK_MM_DISP_PWM026M>,
76                 <&mmsys CLK_MM_DISP_PWM0MM>;
77        clock-names = "main", "mm";
78    };
79