xref: /linux/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml (revision 14e77332e74603efab8347c89d3cda447c3b97c9) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek DISP_PWM Controller
8
9maintainers:
10  - Jitao Shi <jitao.shi@mediatek.com>
11  - Xinlei Lee <xinlei.lee@mediatek.com>
12
13allOf:
14  - $ref: pwm.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - mediatek,mt2701-disp-pwm
21          - mediatek,mt6595-disp-pwm
22          - mediatek,mt8173-disp-pwm
23          - mediatek,mt8183-disp-pwm
24      - items:
25          - const: mediatek,mt8167-disp-pwm
26          - const: mediatek,mt8173-disp-pwm
27      - items:
28          - enum:
29              - mediatek,mt8186-disp-pwm
30              - mediatek,mt8188-disp-pwm
31              - mediatek,mt8192-disp-pwm
32              - mediatek,mt8195-disp-pwm
33          - const: mediatek,mt8183-disp-pwm
34
35  reg:
36    maxItems: 1
37
38  "#pwm-cells":
39    const: 2
40
41  interrupts:
42    maxItems: 1
43
44  clocks:
45    items:
46      - description: Main Clock
47      - description: Mm Clock
48
49  clock-names:
50    items:
51      - const: main
52      - const: mm
53
54required:
55  - compatible
56  - reg
57  - "#pwm-cells"
58  - clocks
59  - clock-names
60
61additionalProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/interrupt-controller/arm-gic.h>
66    #include <dt-bindings/clock/mt8173-clk.h>
67    #include <dt-bindings/interrupt-controller/irq.h>
68
69    pwm0: pwm@1401e000 {
70        compatible = "mediatek,mt8173-disp-pwm";
71        reg = <0x1401e000 0x1000>;
72        #pwm-cells = <2>;
73        clocks = <&mmsys CLK_MM_DISP_PWM026M>,
74                 <&mmsys CLK_MM_DISP_PWM0MM>;
75        clock-names = "main", "mm";
76    };
77