xref: /linux/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX TPM PWM controller
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11  - Sascha Hauer <s.hauer@pengutronix.de>
12  - Fabio Estevam <festevam@gmail.com>
13
14description: |
15  The TPM counter and period counter are shared between multiple
16  channels, so all channels should use same period setting.
17
18allOf:
19  - $ref: pwm.yaml#
20
21properties:
22  "#pwm-cells":
23    const: 3
24
25  compatible:
26    enum:
27      - fsl,imx7ulp-pwm
28
29  reg:
30    maxItems: 1
31
32  assigned-clocks:
33    maxItems: 1
34
35  assigned-clock-parents:
36    maxItems: 1
37
38  clocks:
39    maxItems: 1
40
41required:
42  - compatible
43  - reg
44  - clocks
45
46additionalProperties: false
47
48examples:
49  - |
50    #include <dt-bindings/clock/imx7ulp-clock.h>
51
52    pwm@40250000 {
53        compatible = "fsl,imx7ulp-pwm";
54        reg = <0x40250000 0x1000>;
55        assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
56        assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
57        clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
58        #pwm-cells = <3>;
59    };
60