191610d83SLiu Gang* Freescale Serial RapidIO (SRIO) Controller 291610d83SLiu Gang 391610d83SLiu GangRapidIO port node: 491610d83SLiu GangProperties: 591610d83SLiu Gang - compatible 691610d83SLiu Gang Usage: required 791610d83SLiu Gang Value type: <string> 891610d83SLiu Gang Definition: Must include "fsl,srio" for IP blocks with IP Block 991610d83SLiu Gang Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0. 1091610d83SLiu Gang 11f21ccfa0SMasanari Iida Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major 1291610d83SLiu Gang version in IP Block Revision Register and Y is Minor version. If this 13f21ccfa0SMasanari Iida compatible is provided it should be ordered before "fsl,srio". 1491610d83SLiu Gang 1591610d83SLiu Gang - reg 1691610d83SLiu Gang Usage: required 1791610d83SLiu Gang Value type: <prop-encoded-array> 1891610d83SLiu Gang Definition: A standard property. Specifies the physical address and 1991610d83SLiu Gang length of the SRIO configuration registers. The size should 2091610d83SLiu Gang be set to 0x11000. 2191610d83SLiu Gang 2291610d83SLiu Gang - interrupts 2391610d83SLiu Gang Usage: required 2491610d83SLiu Gang Value type: <prop_encoded-array> 2591610d83SLiu Gang Definition: Specifies the interrupts generated by this device. The 2691610d83SLiu Gang value of the interrupts property consists of one interrupt 2791610d83SLiu Gang specifier. The format of the specifier is defined by the 2891610d83SLiu Gang binding document describing the node's interrupt parent. 2991610d83SLiu Gang 3091610d83SLiu Gang A single IRQ that handles error conditions is specified by this 3191610d83SLiu Gang property. (Typically shared with port-write). 3291610d83SLiu Gang 3391610d83SLiu Gang - fsl,srio-rmu-handle: 3491610d83SLiu Gang Usage: required if rmu node is defined 3591610d83SLiu Gang Value type: <phandle> 3691610d83SLiu Gang Definition: A single <phandle> value that points to the RMU. 3791610d83SLiu Gang (See srio-rmu.txt for more details on RMU node binding) 3891610d83SLiu Gang 3991610d83SLiu GangPort Child Nodes: There should a port child node for each port that exists in 4091610d83SLiu Gangthe controller. The ports are numbered starting at one (1) and should have 4191610d83SLiu Gangthe following properties: 4291610d83SLiu Gang 4391610d83SLiu Gang - cell-index 4491610d83SLiu Gang Usage: required 4591610d83SLiu Gang Value type: <u32> 4691610d83SLiu Gang Definition: A standard property. Matches the port id. 4791610d83SLiu Gang 4891610d83SLiu Gang - ranges 4991610d83SLiu Gang Usage: required if local access windows preset 5091610d83SLiu Gang Value type: <prop-encoded-array> 5191610d83SLiu Gang Definition: A standard property. Utilized to describe the memory mapped 5291610d83SLiu Gang IO space utilized by the controller. This corresponds to the 5391610d83SLiu Gang setting of the local access windows that are targeted to this 5491610d83SLiu Gang SRIO port. 5591610d83SLiu Gang 5691610d83SLiu Gang - fsl,liodn 5791610d83SLiu Gang Usage: optional-but-recommended (for devices with PAMU) 5891610d83SLiu Gang Value type: <prop-encoded-array> 5991610d83SLiu Gang Definition: The logical I/O device number for the PAMU (IOMMU) to be 6091610d83SLiu Gang correctly configured for SRIO accesses. The property should 6191610d83SLiu Gang not exist on devices that do not support PAMU. 6291610d83SLiu Gang 6391610d83SLiu Gang For HW (ie, the P4080) that only supports a LIODN for both 6491610d83SLiu Gang memory and maintenance transactions then a single LIODN is 6591610d83SLiu Gang represented in the property for both transactions. 6691610d83SLiu Gang 6791610d83SLiu Gang For HW (ie, the P304x/P5020, etc) that supports an LIODN for 6891610d83SLiu Gang memory transactions and a unique LIODN for maintenance 6991610d83SLiu Gang transactions then a pair of LIODNs are represented in the 7091610d83SLiu Gang property. Within the pair, the first element represents the 7191610d83SLiu Gang LIODN associated with memory transactions and the second element 7291610d83SLiu Gang represents the LIODN associated with maintenance transactions 7391610d83SLiu Gang for the port. 7491610d83SLiu Gang 75*076fb0c4SFrank RowandNote: All other standard properties (see the Devicetree Specification) 76*076fb0c4SFrank Rowandare allowed but are optional. 7791610d83SLiu Gang 7891610d83SLiu GangExample: 7991610d83SLiu Gang 8091610d83SLiu Gang rapidio: rapidio@ffe0c0000 { 8191610d83SLiu Gang #address-cells = <2>; 8291610d83SLiu Gang #size-cells = <2>; 8391610d83SLiu Gang reg = <0xf 0xfe0c0000 0 0x11000>; 8491610d83SLiu Gang compatible = "fsl,srio"; 8591610d83SLiu Gang interrupts = <16 2 1 11>; /* err_irq */ 8691610d83SLiu Gang fsl,srio-rmu-handle = <&rmu>; 8791610d83SLiu Gang ranges; 8891610d83SLiu Gang 8991610d83SLiu Gang port1 { 9091610d83SLiu Gang cell-index = <1>; 9191610d83SLiu Gang #address-cells = <2>; 9291610d83SLiu Gang #size-cells = <2>; 9391610d83SLiu Gang fsl,liodn = <34>; 9491610d83SLiu Gang ranges = <0 0 0xc 0x20000000 0 0x10000000>; 9591610d83SLiu Gang }; 9691610d83SLiu Gang 9791610d83SLiu Gang port2 { 9891610d83SLiu Gang cell-index = <2>; 9991610d83SLiu Gang #address-cells = <2>; 10091610d83SLiu Gang #size-cells = <2>; 10191610d83SLiu Gang fsl,liodn = <48>; 10291610d83SLiu Gang ranges = <0 0 0xc 0x30000000 0 0x10000000>; 10391610d83SLiu Gang }; 10491610d83SLiu Gang }; 105