1*1723d909SXuelin Shi* Freescale 85xx RAID Engine nodes 2*1723d909SXuelin Shi 3*1723d909SXuelin ShiRAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID 4*1723d909SXuelin ShiEngine should have a separate node. 5*1723d909SXuelin Shi 6*1723d909SXuelin ShiSupported chips: 7*1723d909SXuelin ShiP5020, P5040 8*1723d909SXuelin Shi 9*1723d909SXuelin ShiRequired properties: 10*1723d909SXuelin Shi 11*1723d909SXuelin Shi- compatible: Should contain "fsl,raideng-v1.0" as the value 12*1723d909SXuelin Shi This identifies RAID Engine block. 1 in 1.0 represents 13*1723d909SXuelin Shi major number whereas 0 represents minor number. The 14*1723d909SXuelin Shi version matches the hardware IP version. 15*1723d909SXuelin Shi- reg: offset and length of the register set for the device 16*1723d909SXuelin Shi- ranges: standard ranges property specifying the translation 17*1723d909SXuelin Shi between child address space and parent address space 18*1723d909SXuelin Shi 19*1723d909SXuelin ShiExample: 20*1723d909SXuelin Shi /* P5020 */ 21*1723d909SXuelin Shi raideng: raideng@320000 { 22*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0"; 23*1723d909SXuelin Shi #address-cells = <1>; 24*1723d909SXuelin Shi #size-cells = <1>; 25*1723d909SXuelin Shi reg = <0x320000 0x10000>; 26*1723d909SXuelin Shi ranges = <0 0x320000 0x10000>; 27*1723d909SXuelin Shi }; 28*1723d909SXuelin Shi 29*1723d909SXuelin Shi 30*1723d909SXuelin ShiThere must be a sub-node for each job queue present in RAID Engine 31*1723d909SXuelin ShiThis node must be a sub-node of the main RAID Engine node 32*1723d909SXuelin Shi 33*1723d909SXuelin Shi- compatible: Should contain "fsl,raideng-v1.0-job-queue" as the value 34*1723d909SXuelin Shi This identifies the job queue interface 35*1723d909SXuelin Shi- reg: offset and length of the register set for job queue 36*1723d909SXuelin Shi- ranges: standard ranges property specifying the translation 37*1723d909SXuelin Shi between child address space and parent address space 38*1723d909SXuelin Shi 39*1723d909SXuelin ShiExample: 40*1723d909SXuelin Shi /* P5020 */ 41*1723d909SXuelin Shi raideng_jq0@1000 { 42*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-queue"; 43*1723d909SXuelin Shi reg = <0x1000 0x1000>; 44*1723d909SXuelin Shi ranges = <0x0 0x1000 0x1000>; 45*1723d909SXuelin Shi }; 46*1723d909SXuelin Shi 47*1723d909SXuelin Shi 48*1723d909SXuelin ShiThere must be a sub-node for each job ring present in RAID Engine 49*1723d909SXuelin ShiThis node must be a sub-node of job queue node 50*1723d909SXuelin Shi 51*1723d909SXuelin Shi- compatible: Must contain "fsl,raideng-v1.0-job-ring" as the value 52*1723d909SXuelin Shi This identifies job ring. Should contain either 53*1723d909SXuelin Shi "fsl,raideng-v1.0-hp-ring" or "fsl,raideng-v1.0-lp-ring" 54*1723d909SXuelin Shi depending upon whether ring has high or low priority 55*1723d909SXuelin Shi- reg: offset and length of the register set for job ring 56*1723d909SXuelin Shi- interrupts: interrupt mapping for job ring IRQ 57*1723d909SXuelin Shi 58*1723d909SXuelin ShiOptional property: 59*1723d909SXuelin Shi 60*1723d909SXuelin Shi- fsl,liodn: Specifies the LIODN to be used for Job Ring. This 61*1723d909SXuelin Shi property is normally set by firmware. Value 62*1723d909SXuelin Shi is of 12-bits which is the LIODN number for this JR. 63*1723d909SXuelin Shi This property is used by the IOMMU (PAMU) to distinquish 64*1723d909SXuelin Shi transactions from this JR and than be able to do address 65*1723d909SXuelin Shi translation & protection accordingly. 66*1723d909SXuelin Shi 67*1723d909SXuelin ShiExample: 68*1723d909SXuelin Shi /* P5020 */ 69*1723d909SXuelin Shi raideng_jq0@1000 { 70*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-queue"; 71*1723d909SXuelin Shi reg = <0x1000 0x1000>; 72*1723d909SXuelin Shi ranges = <0x0 0x1000 0x1000>; 73*1723d909SXuelin Shi 74*1723d909SXuelin Shi raideng_jr0: jr@0 { 75*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; 76*1723d909SXuelin Shi reg = <0x0 0x400>; 77*1723d909SXuelin Shi interrupts = <139 2 0 0>; 78*1723d909SXuelin Shi interrupt-parent = <&mpic>; 79*1723d909SXuelin Shi fsl,liodn = <0x41>; 80*1723d909SXuelin Shi }; 81*1723d909SXuelin Shi }; 82