1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip Power Domains 8 9maintainers: 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13description: | 14 Rockchip processors include support for multiple power domains 15 which can be powered up/down by software based on different 16 application scenarios to save power. 17 18 Power domains contained within power-controller node are 19 generic power domain providers documented in 20 Documentation/devicetree/bindings/power/power-domain.yaml. 21 22 IP cores belonging to a power domain should contain a 23 "power-domains" property that is a phandle for the 24 power domain node representing the domain. 25 26properties: 27 $nodename: 28 const: power-controller 29 30 compatible: 31 enum: 32 - rockchip,px30-power-controller 33 - rockchip,rk3036-power-controller 34 - rockchip,rk3066-power-controller 35 - rockchip,rk3128-power-controller 36 - rockchip,rk3188-power-controller 37 - rockchip,rk3228-power-controller 38 - rockchip,rk3288-power-controller 39 - rockchip,rk3328-power-controller 40 - rockchip,rk3366-power-controller 41 - rockchip,rk3368-power-controller 42 - rockchip,rk3399-power-controller 43 - rockchip,rk3562-power-controller 44 - rockchip,rk3568-power-controller 45 - rockchip,rk3576-power-controller 46 - rockchip,rk3588-power-controller 47 - rockchip,rv1126-power-controller 48 49 "#power-domain-cells": 50 const: 1 51 52 "#address-cells": 53 const: 1 54 55 "#size-cells": 56 const: 0 57 58required: 59 - compatible 60 - "#power-domain-cells" 61 62additionalProperties: false 63 64patternProperties: 65 "^power-domain@[0-9a-f]+$": 66 67 $ref: "#/$defs/pd-node" 68 69 unevaluatedProperties: false 70 71 properties: 72 "#address-cells": 73 const: 1 74 75 "#size-cells": 76 const: 0 77 78 patternProperties: 79 "^power-domain@[0-9a-f]+$": 80 81 $ref: "#/$defs/pd-node" 82 83 unevaluatedProperties: false 84 85 properties: 86 "#address-cells": 87 const: 1 88 89 "#size-cells": 90 const: 0 91 92 patternProperties: 93 "^power-domain@[0-9a-f]+$": 94 95 $ref: "#/$defs/pd-node" 96 97 unevaluatedProperties: false 98 99 properties: 100 "#power-domain-cells": 101 const: 0 102 103$defs: 104 pd-node: 105 type: object 106 description: | 107 Represents the power domains within the power controller node. 108 109 properties: 110 reg: 111 maxItems: 1 112 description: | 113 Power domain index. Valid values are defined in 114 "include/dt-bindings/power/px30-power.h" 115 "include/dt-bindings/power/rk3036-power.h" 116 "include/dt-bindings/power/rk3066-power.h" 117 "include/dt-bindings/power/rk3128-power.h" 118 "include/dt-bindings/power/rk3188-power.h" 119 "include/dt-bindings/power/rk3228-power.h" 120 "include/dt-bindings/power/rk3288-power.h" 121 "include/dt-bindings/power/rk3328-power.h" 122 "include/dt-bindings/power/rk3366-power.h" 123 "include/dt-bindings/power/rk3368-power.h" 124 "include/dt-bindings/power/rk3399-power.h" 125 "include/dt-bindings/power/rk3568-power.h" 126 "include/dt-bindings/power/rk3588-power.h" 127 "include/dt-bindings/power/rockchip,rv1126-power.h" 128 129 clocks: 130 minItems: 1 131 maxItems: 30 132 description: | 133 A number of phandles to clocks that need to be enabled 134 while power domain switches state. 135 136 domain-supply: 137 description: domain regulator supply. 138 139 pm_qos: 140 $ref: /schemas/types.yaml#/definitions/phandle-array 141 items: 142 maxItems: 1 143 description: | 144 A number of phandles to qos blocks which need to be saved and restored 145 while power domain switches state. 146 147 "#power-domain-cells": 148 enum: [0, 1] 149 description: 150 Must be 0 for nodes representing a single PM domain and 1 for nodes 151 providing multiple PM domains. 152 153 required: 154 - reg 155 - "#power-domain-cells" 156 157examples: 158 - | 159 #include <dt-bindings/clock/rk3399-cru.h> 160 #include <dt-bindings/power/rk3399-power.h> 161 162 soc { 163 #address-cells = <2>; 164 #size-cells = <2>; 165 166 qos_hdcp: qos@ffa90000 { 167 compatible = "rockchip,rk3399-qos", "syscon"; 168 reg = <0x0 0xffa90000 0x0 0x20>; 169 }; 170 171 qos_iep: qos@ffa98000 { 172 compatible = "rockchip,rk3399-qos", "syscon"; 173 reg = <0x0 0xffa98000 0x0 0x20>; 174 }; 175 176 qos_rga_r: qos@ffab0000 { 177 compatible = "rockchip,rk3399-qos", "syscon"; 178 reg = <0x0 0xffab0000 0x0 0x20>; 179 }; 180 181 qos_rga_w: qos@ffab0080 { 182 compatible = "rockchip,rk3399-qos", "syscon"; 183 reg = <0x0 0xffab0080 0x0 0x20>; 184 }; 185 186 qos_video_m0: qos@ffab8000 { 187 compatible = "rockchip,rk3399-qos", "syscon"; 188 reg = <0x0 0xffab8000 0x0 0x20>; 189 }; 190 191 qos_video_m1_r: qos@ffac0000 { 192 compatible = "rockchip,rk3399-qos", "syscon"; 193 reg = <0x0 0xffac0000 0x0 0x20>; 194 }; 195 196 qos_video_m1_w: qos@ffac0080 { 197 compatible = "rockchip,rk3399-qos", "syscon"; 198 reg = <0x0 0xffac0080 0x0 0x20>; 199 }; 200 201 power-management@ff310000 { 202 compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd"; 203 reg = <0x0 0xff310000 0x0 0x1000>; 204 205 power-controller { 206 compatible = "rockchip,rk3399-power-controller"; 207 #power-domain-cells = <1>; 208 #address-cells = <1>; 209 #size-cells = <0>; 210 211 /* These power domains are grouped by VD_CENTER */ 212 power-domain@RK3399_PD_IEP { 213 reg = <RK3399_PD_IEP>; 214 clocks = <&cru ACLK_IEP>, 215 <&cru HCLK_IEP>; 216 pm_qos = <&qos_iep>; 217 #power-domain-cells = <0>; 218 }; 219 power-domain@RK3399_PD_RGA { 220 reg = <RK3399_PD_RGA>; 221 clocks = <&cru ACLK_RGA>, 222 <&cru HCLK_RGA>; 223 pm_qos = <&qos_rga_r>, 224 <&qos_rga_w>; 225 #power-domain-cells = <0>; 226 }; 227 power-domain@RK3399_PD_VCODEC { 228 reg = <RK3399_PD_VCODEC>; 229 clocks = <&cru ACLK_VCODEC>, 230 <&cru HCLK_VCODEC>; 231 pm_qos = <&qos_video_m0>; 232 #power-domain-cells = <0>; 233 }; 234 power-domain@RK3399_PD_VDU { 235 reg = <RK3399_PD_VDU>; 236 clocks = <&cru ACLK_VDU>, 237 <&cru HCLK_VDU>; 238 pm_qos = <&qos_video_m1_r>, 239 <&qos_video_m1_w>; 240 #power-domain-cells = <0>; 241 }; 242 power-domain@RK3399_PD_VIO { 243 reg = <RK3399_PD_VIO>; 244 #power-domain-cells = <1>; 245 #address-cells = <1>; 246 #size-cells = <0>; 247 248 power-domain@RK3399_PD_HDCP { 249 reg = <RK3399_PD_HDCP>; 250 clocks = <&cru ACLK_HDCP>, 251 <&cru HCLK_HDCP>, 252 <&cru PCLK_HDCP>; 253 pm_qos = <&qos_hdcp>; 254 #power-domain-cells = <0>; 255 }; 256 }; 257 }; 258 }; 259 }; 260