xref: /linux/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml (revision 7a012a692e7cfbca245d195a80f23634d3d74fcc)
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip Power Domains
8
9maintainers:
10  - Elaine Zhang <zhangqing@rock-chips.com>
11  - Heiko Stuebner <heiko@sntech.de>
12
13description: |
14  Rockchip processors include support for multiple power domains
15  which can be powered up/down by software based on different
16  application scenarios to save power.
17
18  Power domains contained within power-controller node are
19  generic power domain providers documented in
20  Documentation/devicetree/bindings/power/power-domain.yaml.
21
22  IP cores belonging to a power domain should contain a
23  "power-domains" property that is a phandle for the
24  power domain node representing the domain.
25
26properties:
27  $nodename:
28    const: power-controller
29
30  compatible:
31    enum:
32      - rockchip,px30-power-controller
33      - rockchip,rk3036-power-controller
34      - rockchip,rk3066-power-controller
35      - rockchip,rk3128-power-controller
36      - rockchip,rk3188-power-controller
37      - rockchip,rk3228-power-controller
38      - rockchip,rk3288-power-controller
39      - rockchip,rk3328-power-controller
40      - rockchip,rk3366-power-controller
41      - rockchip,rk3368-power-controller
42      - rockchip,rk3399-power-controller
43      - rockchip,rk3568-power-controller
44      - rockchip,rk3576-power-controller
45      - rockchip,rk3588-power-controller
46      - rockchip,rv1126-power-controller
47
48  "#power-domain-cells":
49    const: 1
50
51  "#address-cells":
52    const: 1
53
54  "#size-cells":
55    const: 0
56
57required:
58  - compatible
59  - "#power-domain-cells"
60
61additionalProperties: false
62
63patternProperties:
64  "^power-domain@[0-9a-f]+$":
65
66    $ref: "#/$defs/pd-node"
67
68    unevaluatedProperties: false
69
70    properties:
71      "#address-cells":
72        const: 1
73
74      "#size-cells":
75        const: 0
76
77    patternProperties:
78      "^power-domain@[0-9a-f]+$":
79
80        $ref: "#/$defs/pd-node"
81
82        unevaluatedProperties: false
83
84        properties:
85          "#address-cells":
86            const: 1
87
88          "#size-cells":
89            const: 0
90
91        patternProperties:
92          "^power-domain@[0-9a-f]+$":
93
94            $ref: "#/$defs/pd-node"
95
96            unevaluatedProperties: false
97
98            properties:
99              "#power-domain-cells":
100                const: 0
101
102$defs:
103  pd-node:
104    type: object
105    description: |
106      Represents the power domains within the power controller node.
107
108    properties:
109      reg:
110        maxItems: 1
111        description: |
112          Power domain index. Valid values are defined in
113          "include/dt-bindings/power/px30-power.h"
114          "include/dt-bindings/power/rk3036-power.h"
115          "include/dt-bindings/power/rk3066-power.h"
116          "include/dt-bindings/power/rk3128-power.h"
117          "include/dt-bindings/power/rk3188-power.h"
118          "include/dt-bindings/power/rk3228-power.h"
119          "include/dt-bindings/power/rk3288-power.h"
120          "include/dt-bindings/power/rk3328-power.h"
121          "include/dt-bindings/power/rk3366-power.h"
122          "include/dt-bindings/power/rk3368-power.h"
123          "include/dt-bindings/power/rk3399-power.h"
124          "include/dt-bindings/power/rk3568-power.h"
125          "include/dt-bindings/power/rk3588-power.h"
126          "include/dt-bindings/power/rockchip,rv1126-power.h"
127
128      clocks:
129        minItems: 1
130        maxItems: 30
131        description: |
132          A number of phandles to clocks that need to be enabled
133          while power domain switches state.
134
135      domain-supply:
136        description: domain regulator supply.
137
138      pm_qos:
139        $ref: /schemas/types.yaml#/definitions/phandle-array
140        items:
141          maxItems: 1
142        description: |
143          A number of phandles to qos blocks which need to be saved and restored
144          while power domain switches state.
145
146      "#power-domain-cells":
147        enum: [0, 1]
148        description:
149          Must be 0 for nodes representing a single PM domain and 1 for nodes
150          providing multiple PM domains.
151
152    required:
153      - reg
154      - "#power-domain-cells"
155
156examples:
157  - |
158    #include <dt-bindings/clock/rk3399-cru.h>
159    #include <dt-bindings/power/rk3399-power.h>
160
161    soc {
162        #address-cells = <2>;
163        #size-cells = <2>;
164
165        qos_hdcp: qos@ffa90000 {
166            compatible = "rockchip,rk3399-qos", "syscon";
167            reg = <0x0 0xffa90000 0x0 0x20>;
168        };
169
170        qos_iep: qos@ffa98000 {
171            compatible = "rockchip,rk3399-qos", "syscon";
172            reg = <0x0 0xffa98000 0x0 0x20>;
173        };
174
175        qos_rga_r: qos@ffab0000 {
176            compatible = "rockchip,rk3399-qos", "syscon";
177            reg = <0x0 0xffab0000 0x0 0x20>;
178        };
179
180        qos_rga_w: qos@ffab0080 {
181            compatible = "rockchip,rk3399-qos", "syscon";
182            reg = <0x0 0xffab0080 0x0 0x20>;
183        };
184
185        qos_video_m0: qos@ffab8000 {
186            compatible = "rockchip,rk3399-qos", "syscon";
187            reg = <0x0 0xffab8000 0x0 0x20>;
188        };
189
190        qos_video_m1_r: qos@ffac0000 {
191            compatible = "rockchip,rk3399-qos", "syscon";
192            reg = <0x0 0xffac0000 0x0 0x20>;
193        };
194
195        qos_video_m1_w: qos@ffac0080 {
196            compatible = "rockchip,rk3399-qos", "syscon";
197            reg = <0x0 0xffac0080 0x0 0x20>;
198        };
199
200        power-management@ff310000 {
201            compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
202            reg = <0x0 0xff310000 0x0 0x1000>;
203
204            power-controller {
205                compatible = "rockchip,rk3399-power-controller";
206                #power-domain-cells = <1>;
207                #address-cells = <1>;
208                #size-cells = <0>;
209
210                /* These power domains are grouped by VD_CENTER */
211                power-domain@RK3399_PD_IEP {
212                    reg = <RK3399_PD_IEP>;
213                    clocks = <&cru ACLK_IEP>,
214                             <&cru HCLK_IEP>;
215                    pm_qos = <&qos_iep>;
216                    #power-domain-cells = <0>;
217                };
218                power-domain@RK3399_PD_RGA {
219                    reg = <RK3399_PD_RGA>;
220                    clocks = <&cru ACLK_RGA>,
221                             <&cru HCLK_RGA>;
222                    pm_qos = <&qos_rga_r>,
223                             <&qos_rga_w>;
224                    #power-domain-cells = <0>;
225                };
226                power-domain@RK3399_PD_VCODEC {
227                    reg = <RK3399_PD_VCODEC>;
228                    clocks = <&cru ACLK_VCODEC>,
229                             <&cru HCLK_VCODEC>;
230                    pm_qos = <&qos_video_m0>;
231                    #power-domain-cells = <0>;
232                };
233                power-domain@RK3399_PD_VDU {
234                    reg = <RK3399_PD_VDU>;
235                    clocks = <&cru ACLK_VDU>,
236                             <&cru HCLK_VDU>;
237                    pm_qos = <&qos_video_m1_r>,
238                             <&qos_video_m1_w>;
239                    #power-domain-cells = <0>;
240                };
241                power-domain@RK3399_PD_VIO {
242                    reg = <RK3399_PD_VIO>;
243                    #power-domain-cells = <1>;
244                    #address-cells = <1>;
245                    #size-cells = <0>;
246
247                    power-domain@RK3399_PD_HDCP {
248                        reg = <RK3399_PD_HDCP>;
249                        clocks = <&cru ACLK_HDCP>,
250                                 <&cru HCLK_HDCP>,
251                                 <&cru PCLK_HDCP>;
252                        pm_qos = <&qos_hdcp>;
253                        #power-domain-cells = <0>;
254                    };
255                };
256            };
257        };
258    };
259