xref: /linux/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml (revision 5f693adf41b81e9646dd65a5e077c0102cd7f90b)
10c03fa00SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
20c03fa00SAnson Huang%YAML 1.2
30c03fa00SAnson Huang---
40c03fa00SAnson Huang$id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
50c03fa00SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml#
60c03fa00SAnson Huang
70c03fa00SAnson Huangtitle: Freescale i.MX General Power Controller
80c03fa00SAnson Huang
90c03fa00SAnson Huangmaintainers:
100c03fa00SAnson Huang  - Philipp Zabel <p.zabel@pengutronix.de>
110c03fa00SAnson Huang
120c03fa00SAnson Huangdescription: |
130c03fa00SAnson Huang  The i.MX6 General Power Control (GPC) block contains DVFS load tracking
140c03fa00SAnson Huang  counters and Power Gating Control (PGC).
150c03fa00SAnson Huang
160c03fa00SAnson Huang  The power domains are generic power domain providers as documented in
170c03fa00SAnson Huang  Documentation/devicetree/bindings/power/power-domain.yaml. They are
180c03fa00SAnson Huang  described as subnodes of the power gating controller 'pgc' node of the GPC.
190c03fa00SAnson Huang
200c03fa00SAnson Huang  IP cores belonging to a power domain should contain a 'power-domains'
210c03fa00SAnson Huang  property that is a phandle pointing to the power domain the device belongs
220c03fa00SAnson Huang  to.
230c03fa00SAnson Huang
240c03fa00SAnson Huangproperties:
250c03fa00SAnson Huang  compatible:
26cd6ba752SKrzysztof Kozlowski    oneOf:
27cd6ba752SKrzysztof Kozlowski      - enum:
280c03fa00SAnson Huang          - fsl,imx6q-gpc
29*5f693adfSKrzysztof Kozlowski      - items:
30*5f693adfSKrzysztof Kozlowski          - enum:
310c03fa00SAnson Huang              - fsl,imx6qp-gpc
320c03fa00SAnson Huang              - fsl,imx6sl-gpc
330c03fa00SAnson Huang              - fsl,imx6sx-gpc
34cd6ba752SKrzysztof Kozlowski              - fsl,imx6ul-gpc
35cd6ba752SKrzysztof Kozlowski          - const: fsl,imx6q-gpc
360c03fa00SAnson Huang
370c03fa00SAnson Huang  reg:
380c03fa00SAnson Huang    maxItems: 1
390c03fa00SAnson Huang
400c03fa00SAnson Huang  interrupts:
410c03fa00SAnson Huang    maxItems: 1
420c03fa00SAnson Huang
430c03fa00SAnson Huang  clocks:
440c03fa00SAnson Huang    maxItems: 1
450c03fa00SAnson Huang
460c03fa00SAnson Huang  clock-names:
470c03fa00SAnson Huang    const: ipg
480c03fa00SAnson Huang
490c03fa00SAnson Huang  pgc:
500c03fa00SAnson Huang    type: object
517b3c2046SRob Herring    additionalProperties: false
520c03fa00SAnson Huang    description: list of power domains provided by this controller.
530c03fa00SAnson Huang
547b3c2046SRob Herring    properties:
557b3c2046SRob Herring      '#address-cells':
567b3c2046SRob Herring        const: 1
577b3c2046SRob Herring
587b3c2046SRob Herring      '#size-cells':
597b3c2046SRob Herring        const: 0
607b3c2046SRob Herring
610c03fa00SAnson Huang    patternProperties:
620c03fa00SAnson Huang      "power-domain@[0-9]$":
630c03fa00SAnson Huang        type: object
647b3c2046SRob Herring        additionalProperties: false
657b3c2046SRob Herring
660c03fa00SAnson Huang        properties:
670c03fa00SAnson Huang
680c03fa00SAnson Huang          '#power-domain-cells':
690c03fa00SAnson Huang            const: 0
700c03fa00SAnson Huang
710c03fa00SAnson Huang          reg:
720c03fa00SAnson Huang            description: |
730c03fa00SAnson Huang              The following DOMAIN_INDEX values are valid for i.MX6Q:
740c03fa00SAnson Huang                ARM_DOMAIN     0
750c03fa00SAnson Huang                PU_DOMAIN      1
760c03fa00SAnson Huang              The following additional DOMAIN_INDEX value is valid for i.MX6SL:
770c03fa00SAnson Huang                DISPLAY_DOMAIN 2
780c03fa00SAnson Huang              The following additional DOMAIN_INDEX value is valid for i.MX6SX:
790c03fa00SAnson Huang                PCI_DOMAIN     3
800c03fa00SAnson Huang            maxItems: 1
810c03fa00SAnson Huang
820c03fa00SAnson Huang          clocks:
830c03fa00SAnson Huang            description: |
840c03fa00SAnson Huang              A number of phandles to clocks that need to be enabled during domain
850c03fa00SAnson Huang              power-up sequencing to ensure reset propagation into devices located
860c03fa00SAnson Huang              inside this power domain.
870c03fa00SAnson Huang            minItems: 1
880c03fa00SAnson Huang            maxItems: 7
890c03fa00SAnson Huang
900c03fa00SAnson Huang          power-supply: true
910c03fa00SAnson Huang
920c03fa00SAnson Huang        required:
930c03fa00SAnson Huang          - '#power-domain-cells'
940c03fa00SAnson Huang          - reg
950c03fa00SAnson Huang
960c03fa00SAnson Huang    required:
977b3c2046SRob Herring      - '#address-cells'
987b3c2046SRob Herring      - '#size-cells'
997b3c2046SRob Herring
1007b3c2046SRob Herringrequired:
1010c03fa00SAnson Huang  - compatible
1020c03fa00SAnson Huang  - reg
1030c03fa00SAnson Huang  - interrupts
1040c03fa00SAnson Huang  - clocks
1050c03fa00SAnson Huang  - clock-names
1060c03fa00SAnson Huang  - pgc
1070c03fa00SAnson Huang
1080c03fa00SAnson HuangadditionalProperties: false
1090c03fa00SAnson Huang
1100c03fa00SAnson Huangexamples:
1110c03fa00SAnson Huang  - |
1120c03fa00SAnson Huang    #include <dt-bindings/clock/imx6qdl-clock.h>
1130c03fa00SAnson Huang    #include <dt-bindings/interrupt-controller/arm-gic.h>
1140c03fa00SAnson Huang
1150c03fa00SAnson Huang    gpc@20dc000 {
1160c03fa00SAnson Huang        compatible = "fsl,imx6q-gpc";
1170c03fa00SAnson Huang        reg = <0x020dc000 0x4000>;
1180c03fa00SAnson Huang        interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
1190c03fa00SAnson Huang        clocks = <&clks IMX6QDL_CLK_IPG>;
1200c03fa00SAnson Huang        clock-names = "ipg";
1210c03fa00SAnson Huang
1220c03fa00SAnson Huang        pgc {
1230c03fa00SAnson Huang            #address-cells = <1>;
1240c03fa00SAnson Huang            #size-cells = <0>;
1250c03fa00SAnson Huang
1260c03fa00SAnson Huang            power-domain@0 {
1270c03fa00SAnson Huang                reg = <0>;
1280c03fa00SAnson Huang                #power-domain-cells = <0>;
1290c03fa00SAnson Huang            };
1300c03fa00SAnson Huang
1310c03fa00SAnson Huang            pd_pu: power-domain@1 {
1320c03fa00SAnson Huang                reg = <1>;
1330c03fa00SAnson Huang                #power-domain-cells = <0>;
1340c03fa00SAnson Huang                power-supply = <&reg_pu>;
1350c03fa00SAnson Huang                clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
1360c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_GPU3D_SHADER>,
1370c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_GPU2D_CORE>,
1380c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_GPU2D_AXI>,
1390c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_OPENVG_AXI>,
1400c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_VPU_AXI>;
1410c03fa00SAnson Huang            };
1420c03fa00SAnson Huang        };
1430c03fa00SAnson Huang    };
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