xref: /linux/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
10c03fa00SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
20c03fa00SAnson Huang%YAML 1.2
30c03fa00SAnson Huang---
40c03fa00SAnson Huang$id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
50c03fa00SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml#
60c03fa00SAnson Huang
70c03fa00SAnson Huangtitle: Freescale i.MX General Power Controller
80c03fa00SAnson Huang
90c03fa00SAnson Huangmaintainers:
100c03fa00SAnson Huang  - Philipp Zabel <p.zabel@pengutronix.de>
110c03fa00SAnson Huang
120c03fa00SAnson Huangdescription: |
130c03fa00SAnson Huang  The i.MX6 General Power Control (GPC) block contains DVFS load tracking
140c03fa00SAnson Huang  counters and Power Gating Control (PGC).
150c03fa00SAnson Huang
160c03fa00SAnson Huang  The power domains are generic power domain providers as documented in
170c03fa00SAnson Huang  Documentation/devicetree/bindings/power/power-domain.yaml. They are
180c03fa00SAnson Huang  described as subnodes of the power gating controller 'pgc' node of the GPC.
190c03fa00SAnson Huang
200c03fa00SAnson Huang  IP cores belonging to a power domain should contain a 'power-domains'
210c03fa00SAnson Huang  property that is a phandle pointing to the power domain the device belongs
220c03fa00SAnson Huang  to.
230c03fa00SAnson Huang
240c03fa00SAnson Huangproperties:
250c03fa00SAnson Huang  compatible:
26cd6ba752SKrzysztof Kozlowski    oneOf:
27cd6ba752SKrzysztof Kozlowski      - enum:
280c03fa00SAnson Huang          - fsl,imx6q-gpc
295f693adfSKrzysztof Kozlowski      - items:
305f693adfSKrzysztof Kozlowski          - enum:
310c03fa00SAnson Huang              - fsl,imx6qp-gpc
320c03fa00SAnson Huang              - fsl,imx6sl-gpc
330c03fa00SAnson Huang              - fsl,imx6sx-gpc
34cd6ba752SKrzysztof Kozlowski              - fsl,imx6ul-gpc
35cd6ba752SKrzysztof Kozlowski          - const: fsl,imx6q-gpc
360c03fa00SAnson Huang
370c03fa00SAnson Huang  reg:
380c03fa00SAnson Huang    maxItems: 1
390c03fa00SAnson Huang
400c03fa00SAnson Huang  interrupts:
410c03fa00SAnson Huang    maxItems: 1
420c03fa00SAnson Huang
43*30f6359cSKrzysztof Kozlowski  interrupt-controller: true
44*30f6359cSKrzysztof Kozlowski  '#interrupt-cells':
45*30f6359cSKrzysztof Kozlowski    const: 3
46*30f6359cSKrzysztof Kozlowski
470c03fa00SAnson Huang  clocks:
480c03fa00SAnson Huang    maxItems: 1
490c03fa00SAnson Huang
500c03fa00SAnson Huang  clock-names:
510c03fa00SAnson Huang    const: ipg
520c03fa00SAnson Huang
530c03fa00SAnson Huang  pgc:
540c03fa00SAnson Huang    type: object
557b3c2046SRob Herring    additionalProperties: false
560c03fa00SAnson Huang    description: list of power domains provided by this controller.
570c03fa00SAnson Huang
587b3c2046SRob Herring    properties:
597b3c2046SRob Herring      '#address-cells':
607b3c2046SRob Herring        const: 1
617b3c2046SRob Herring
627b3c2046SRob Herring      '#size-cells':
637b3c2046SRob Herring        const: 0
647b3c2046SRob Herring
650c03fa00SAnson Huang    patternProperties:
660c03fa00SAnson Huang      "power-domain@[0-9]$":
670c03fa00SAnson Huang        type: object
687b3c2046SRob Herring        additionalProperties: false
697b3c2046SRob Herring
700c03fa00SAnson Huang        properties:
710c03fa00SAnson Huang
720c03fa00SAnson Huang          '#power-domain-cells':
730c03fa00SAnson Huang            const: 0
740c03fa00SAnson Huang
750c03fa00SAnson Huang          reg:
760c03fa00SAnson Huang            description: |
770c03fa00SAnson Huang              The following DOMAIN_INDEX values are valid for i.MX6Q:
780c03fa00SAnson Huang                ARM_DOMAIN     0
790c03fa00SAnson Huang                PU_DOMAIN      1
800c03fa00SAnson Huang              The following additional DOMAIN_INDEX value is valid for i.MX6SL:
810c03fa00SAnson Huang                DISPLAY_DOMAIN 2
820c03fa00SAnson Huang              The following additional DOMAIN_INDEX value is valid for i.MX6SX:
830c03fa00SAnson Huang                PCI_DOMAIN     3
840c03fa00SAnson Huang            maxItems: 1
850c03fa00SAnson Huang
860c03fa00SAnson Huang          clocks:
870c03fa00SAnson Huang            description: |
880c03fa00SAnson Huang              A number of phandles to clocks that need to be enabled during domain
890c03fa00SAnson Huang              power-up sequencing to ensure reset propagation into devices located
900c03fa00SAnson Huang              inside this power domain.
910c03fa00SAnson Huang            minItems: 1
920c03fa00SAnson Huang            maxItems: 7
930c03fa00SAnson Huang
940c03fa00SAnson Huang          power-supply: true
950c03fa00SAnson Huang
960c03fa00SAnson Huang        required:
970c03fa00SAnson Huang          - '#power-domain-cells'
980c03fa00SAnson Huang          - reg
990c03fa00SAnson Huang
1000c03fa00SAnson Huang    required:
1017b3c2046SRob Herring      - '#address-cells'
1027b3c2046SRob Herring      - '#size-cells'
1037b3c2046SRob Herring
1047b3c2046SRob Herringrequired:
1050c03fa00SAnson Huang  - compatible
1060c03fa00SAnson Huang  - reg
1070c03fa00SAnson Huang  - interrupts
1080c03fa00SAnson Huang  - clocks
1090c03fa00SAnson Huang  - clock-names
1100c03fa00SAnson Huang  - pgc
1110c03fa00SAnson Huang
1120c03fa00SAnson HuangadditionalProperties: false
1130c03fa00SAnson Huang
1140c03fa00SAnson Huangexamples:
1150c03fa00SAnson Huang  - |
1160c03fa00SAnson Huang    #include <dt-bindings/clock/imx6qdl-clock.h>
1170c03fa00SAnson Huang    #include <dt-bindings/interrupt-controller/arm-gic.h>
1180c03fa00SAnson Huang
1190c03fa00SAnson Huang    gpc@20dc000 {
1200c03fa00SAnson Huang        compatible = "fsl,imx6q-gpc";
1210c03fa00SAnson Huang        reg = <0x020dc000 0x4000>;
1220c03fa00SAnson Huang        interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
1230c03fa00SAnson Huang        clocks = <&clks IMX6QDL_CLK_IPG>;
1240c03fa00SAnson Huang        clock-names = "ipg";
1250c03fa00SAnson Huang
1260c03fa00SAnson Huang        pgc {
1270c03fa00SAnson Huang            #address-cells = <1>;
1280c03fa00SAnson Huang            #size-cells = <0>;
1290c03fa00SAnson Huang
1300c03fa00SAnson Huang            power-domain@0 {
1310c03fa00SAnson Huang                reg = <0>;
1320c03fa00SAnson Huang                #power-domain-cells = <0>;
1330c03fa00SAnson Huang            };
1340c03fa00SAnson Huang
1350c03fa00SAnson Huang            pd_pu: power-domain@1 {
1360c03fa00SAnson Huang                reg = <1>;
1370c03fa00SAnson Huang                #power-domain-cells = <0>;
1380c03fa00SAnson Huang                power-supply = <&reg_pu>;
1390c03fa00SAnson Huang                clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
1400c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_GPU3D_SHADER>,
1410c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_GPU2D_CORE>,
1420c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_GPU2D_AXI>,
1430c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_OPENVG_AXI>,
1440c03fa00SAnson Huang                         <&clks IMX6QDL_CLK_VPU_AXI>;
1450c03fa00SAnson Huang            };
1460c03fa00SAnson Huang        };
1470c03fa00SAnson Huang    };
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