1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung S3C/S5P/Exynos SoC pin controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 14description: | 15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin 16 controller. 17 18 All the pin controller nodes should be represented in the aliases node using 19 the following format 'pinctrl{n}' where n is a unique number for the alias. 20 21 The controller supports three types of interrupts:: 22 - External GPIO interrupts (see interrupts property in pin controller node); 23 24 - External wake-up interrupts - multiplexed (capable of waking up the system 25 see interrupts property in external wake-up interrupt controller node - 26 samsung,pinctrl-wakeup-interrupt.yaml); 27 28 - External wake-up interrupts - direct (capable of waking up the system, see 29 interrupts property in every bank of pin controller with external wake-up 30 interrupt controller - samsung,pinctrl-gpio-bank.yaml). 31 32properties: 33 $nodename: 34 pattern: "^pinctrl(@.*)?" 35 36 compatible: 37 enum: 38 - google,gs101-pinctrl 39 - samsung,s3c2412-pinctrl 40 - samsung,s3c2416-pinctrl 41 - samsung,s3c2440-pinctrl 42 - samsung,s3c2450-pinctrl 43 - samsung,s3c64xx-pinctrl 44 - samsung,s5pv210-pinctrl 45 - samsung,exynos2200-pinctrl 46 - samsung,exynos3250-pinctrl 47 - samsung,exynos4210-pinctrl 48 - samsung,exynos4x12-pinctrl 49 - samsung,exynos5250-pinctrl 50 - samsung,exynos5260-pinctrl 51 - samsung,exynos5410-pinctrl 52 - samsung,exynos5420-pinctrl 53 - samsung,exynos5433-pinctrl 54 - samsung,exynos7-pinctrl 55 - samsung,exynos7870-pinctrl 56 - samsung,exynos7885-pinctrl 57 - samsung,exynos850-pinctrl 58 - samsung,exynos8895-pinctrl 59 - samsung,exynos9810-pinctrl 60 - samsung,exynos990-pinctrl 61 - samsung,exynosautov9-pinctrl 62 - samsung,exynosautov920-pinctrl 63 - tesla,fsd-pinctrl 64 65 interrupts: 66 description: 67 Required for GPIO banks supporting external GPIO interrupts. 68 maxItems: 1 69 70 power-domains: 71 maxItems: 1 72 73 reg: 74 description: 75 Second base address of the pin controller if the specific registers of 76 the pin controller are separated into the different base address. 77 Only certain banks of certain pin controller might need it. 78 minItems: 1 79 maxItems: 2 80 81 clocks: 82 maxItems: 1 83 84 clock-names: 85 items: 86 - const: pclk 87 88 wakeup-interrupt-controller: 89 $ref: samsung,pinctrl-wakeup-interrupt.yaml 90 91patternProperties: 92 "^[a-z]+[0-9]*-gpio-bank$": 93 description: 94 Pin banks of the controller are represented by child nodes of the 95 controller node. Bank name is taken from name of the node. 96 $ref: samsung,pinctrl-gpio-bank.yaml 97 98 "^[a-z0-9-]+-pins$": 99 oneOf: 100 - $ref: samsung,pinctrl-pins-cfg.yaml 101 required: 102 - samsung,pins 103 - type: object 104 patternProperties: 105 "^[a-z0-9-]+-pins$": 106 $ref: samsung,pinctrl-pins-cfg.yaml 107 108 additionalProperties: false 109 110 "^(initial|sleep)-state$": 111 type: object 112 additionalProperties: false 113 114 patternProperties: 115 "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$": 116 $ref: samsung,pinctrl-pins-cfg.yaml 117 118 properties: 119 samsung,pins: 120 description: See samsung,pinctrl-pins-cfg.yaml 121 $ref: /schemas/types.yaml#/definitions/string-array 122 maxItems: 1 123 124 required: 125 - samsung,pins 126 127 unevaluatedProperties: false 128 129required: 130 - compatible 131 - reg 132 133allOf: 134 - $ref: pinctrl.yaml# 135 - if: 136 properties: 137 compatible: 138 contains: 139 const: google,gs101-pinctrl 140 then: 141 required: 142 - clocks 143 - clock-names 144 else: 145 properties: 146 clocks: false 147 clock-names: false 148 149 - if: 150 properties: 151 compatible: 152 contains: 153 const: samsung,exynos5433-pinctrl 154 then: 155 properties: 156 reg: 157 minItems: 1 158 maxItems: 2 159 else: 160 properties: 161 reg: 162 minItems: 1 163 maxItems: 1 164 165additionalProperties: false 166 167examples: 168 - | 169 pinctrl@7f008000 { 170 compatible = "samsung,s3c64xx-pinctrl"; 171 reg = <0x7f008000 0x1000>; 172 interrupt-parent = <&vic1>; 173 interrupts = <21>; 174 175 wakeup-interrupt-controller { 176 compatible = "samsung,s3c64xx-wakeup-eint"; 177 interrupts-extended = <&vic0 0>, 178 <&vic0 1>, 179 <&vic1 0>, 180 <&vic1 1>; 181 }; 182 183 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 184 gpa-gpio-bank { 185 gpio-controller; 186 #gpio-cells = <2>; 187 interrupt-controller; 188 #interrupt-cells = <2>; 189 }; 190 191 // ... 192 193 uart0-data-pins { 194 samsung,pins = "gpa-0", "gpa-1"; 195 samsung,pin-function = <2>; 196 samsung,pin-pud = <0>; 197 }; 198 199 // ... 200 }; 201 202 - | 203 #include <dt-bindings/interrupt-controller/arm-gic.h> 204 205 pinctrl@11400000 { 206 compatible = "samsung,exynos4210-pinctrl"; 207 reg = <0x11400000 0x1000>; 208 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 209 210 pinctrl-names = "default"; 211 pinctrl-0 = <&sleep0>; 212 213 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 214 gpa0-gpio-bank { 215 gpio-controller; 216 #gpio-cells = <2>; 217 interrupt-controller; 218 #interrupt-cells = <2>; 219 }; 220 221 // ... 222 223 uart0-data-pins { 224 samsung,pins = "gpa0-0", "gpa0-1"; 225 samsung,pin-function = <2>; 226 samsung,pin-pud = <0>; 227 samsung,pin-drv = <0>; 228 }; 229 230 // ... 231 232 sleep0: sleep-state { 233 gpa0-0-pin { 234 samsung,pins = "gpa0-0"; 235 samsung,pin-con-pdn = <2>; 236 samsung,pin-pud-pdn = <0>; 237 }; 238 239 gpa0-1-pin { 240 samsung,pins = "gpa0-1"; 241 samsung,pin-con-pdn = <0>; 242 samsung,pin-pud-pdn = <0>; 243 }; 244 245 // ... 246 }; 247 }; 248 249 - | 250 #include <dt-bindings/interrupt-controller/arm-gic.h> 251 252 pinctrl@11000000 { 253 compatible = "samsung,exynos4210-pinctrl"; 254 reg = <0x11000000 0x1000>; 255 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 256 257 wakeup-interrupt-controller { 258 compatible = "samsung,exynos4210-wakeup-eint"; 259 interrupt-parent = <&gic>; 260 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 261 }; 262 263 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 264 gpj0-gpio-bank { 265 gpio-controller; 266 #gpio-cells = <2>; 267 interrupt-controller; 268 #interrupt-cells = <2>; 269 }; 270 271 /* Pin bank without external interrupts */ 272 gpy0-gpio-bank { 273 gpio-controller; 274 #gpio-cells = <2>; 275 }; 276 277 /* Pin bank with external direct wake-up interrupts */ 278 gpx0-gpio-bank { 279 gpio-controller; 280 #gpio-cells = <2>; 281 282 interrupt-controller; 283 interrupt-parent = <&gic>; 284 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 292 #interrupt-cells = <2>; 293 }; 294 295 // ... 296 297 sd0-clk-pins { 298 samsung,pins = "gpk0-0"; 299 samsung,pin-function = <2>; 300 samsung,pin-pud = <0>; 301 samsung,pin-drv = <3>; 302 }; 303 304 sd4-bus-width8-pins { 305 part-1-pins { 306 samsung,pins = "gpk0-3", "gpk0-4", 307 "gpk0-5", "gpk0-6"; 308 samsung,pin-function = <3>; 309 samsung,pin-pud = <3>; 310 samsung,pin-drv = <3>; 311 }; 312 313 part-2-pins { 314 samsung,pins = "gpk1-3", "gpk1-4", 315 "gpk1-5", "gpk1-6"; 316 samsung,pin-function = <4>; 317 samsung,pin-pud = <3>; 318 samsung,pin-drv = <3>; 319 }; 320 }; 321 322 // ... 323 324 otg-gp-pins { 325 samsung,pins = "gpx3-3"; 326 samsung,pin-function = <1>; 327 samsung,pin-pud = <0>; 328 samsung,pin-drv = <0>; 329 samsung,pin-val = <0>; 330 }; 331 }; 332 333 - | 334 #include <dt-bindings/interrupt-controller/arm-gic.h> 335 336 pinctrl@10580000 { 337 compatible = "samsung,exynos5433-pinctrl"; 338 reg = <0x10580000 0x1a20>, <0x11090000 0x100>; 339 340 pinctrl-names = "default"; 341 pinctrl-0 = <&initial_alive>; 342 343 wakeup-interrupt-controller { 344 compatible = "samsung,exynos5433-wakeup-eint", 345 "samsung,exynos7-wakeup-eint"; 346 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 347 }; 348 349 /* Pin bank with external direct wake-up interrupts */ 350 gpa0-gpio-bank { 351 gpio-controller; 352 #gpio-cells = <2>; 353 354 interrupt-controller; 355 interrupt-parent = <&gic>; 356 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 364 #interrupt-cells = <2>; 365 }; 366 367 // ... 368 369 te-irq-pins { 370 samsung,pins = "gpf1-3"; 371 samsung,pin-function = <0xf>; 372 }; 373 374 // .. 375 376 initial_alive: initial-state { 377 gpa0-0-pin { 378 samsung,pins = "gpa0-0"; 379 samsung,pin-function = <0>; 380 samsung,pin-pud = <1>; 381 samsung,pin-drv = <0>; 382 }; 383 384 // ... 385 }; 386 }; 387 388 - | 389 #include <dt-bindings/interrupt-controller/arm-gic.h> 390 391 pinctrl@114b0000 { 392 compatible = "samsung,exynos5433-pinctrl"; 393 reg = <0x114b0000 0x1000>; 394 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 395 power-domains = <&pd_aud>; 396 397 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 398 gpz0-gpio-bank { 399 gpio-controller; 400 #gpio-cells = <2>; 401 interrupt-controller; 402 #interrupt-cells = <2>; 403 }; 404 405 // ... 406 407 i2s0-bus-pins { 408 samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3", 409 "gpz0-4", "gpz0-5", "gpz0-6"; 410 samsung,pin-function = <2>; 411 samsung,pin-pud = <0>; 412 samsung,pin-drv = <0>; 413 }; 414 415 // ... 416 }; 417