1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung S3C/S5P/Exynos SoC pin controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 14description: | 15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin 16 controller. 17 18 All the pin controller nodes should be represented in the aliases node using 19 the following format 'pinctrl{n}' where n is a unique number for the alias. 20 21 The controller supports three types of interrupts:: 22 - External GPIO interrupts (see interrupts property in pin controller node); 23 24 - External wake-up interrupts - multiplexed (capable of waking up the system 25 see interrupts property in external wake-up interrupt controller node - 26 samsung,pinctrl-wakeup-interrupt.yaml); 27 28 - External wake-up interrupts - direct (capable of waking up the system, see 29 interrupts property in every bank of pin controller with external wake-up 30 interrupt controller - samsung,pinctrl-gpio-bank.yaml). 31 32properties: 33 $nodename: 34 pattern: "^pinctrl(@.*)?" 35 36 compatible: 37 enum: 38 - axis,artpec8-pinctrl 39 - axis,artpec9-pinctrl 40 - google,gs101-pinctrl 41 - samsung,s3c64xx-pinctrl 42 - samsung,s5pv210-pinctrl 43 - samsung,exynos2200-pinctrl 44 - samsung,exynos3250-pinctrl 45 - samsung,exynos4210-pinctrl 46 - samsung,exynos4x12-pinctrl 47 - samsung,exynos5250-pinctrl 48 - samsung,exynos5260-pinctrl 49 - samsung,exynos5410-pinctrl 50 - samsung,exynos5420-pinctrl 51 - samsung,exynos5433-pinctrl 52 - samsung,exynos7-pinctrl 53 - samsung,exynos7870-pinctrl 54 - samsung,exynos7885-pinctrl 55 - samsung,exynos850-pinctrl 56 - samsung,exynos8890-pinctrl 57 - samsung,exynos8895-pinctrl 58 - samsung,exynos9610-pinctrl 59 - samsung,exynos9810-pinctrl 60 - samsung,exynos990-pinctrl 61 - samsung,exynosautov9-pinctrl 62 - samsung,exynosautov920-pinctrl 63 - tesla,fsd-pinctrl 64 65 interrupts: 66 description: 67 Required for GPIO banks supporting external GPIO interrupts. 68 maxItems: 1 69 70 power-domains: 71 maxItems: 1 72 73 reg: 74 description: 75 Second base address of the pin controller if the specific registers of 76 the pin controller are separated into the different base address. 77 Only certain banks of certain pin controller might need it. 78 minItems: 1 79 maxItems: 2 80 81 clocks: 82 maxItems: 1 83 84 clock-names: 85 items: 86 - const: pclk 87 88 wakeup-interrupt-controller: 89 $ref: samsung,pinctrl-wakeup-interrupt.yaml 90 91patternProperties: 92 "^[a-z]+[0-9]*-gpio-bank$": 93 description: 94 Pin banks of the controller are represented by child nodes of the 95 controller node. Bank name is taken from name of the node. 96 $ref: samsung,pinctrl-gpio-bank.yaml 97 98 "^[a-z0-9-]+-pins$": 99 oneOf: 100 - $ref: samsung,pinctrl-pins-cfg.yaml 101 required: 102 - samsung,pins 103 - type: object 104 patternProperties: 105 "^[a-z0-9-]+-pins$": 106 $ref: samsung,pinctrl-pins-cfg.yaml 107 108 additionalProperties: false 109 110 "^(initial|sleep)-state$": 111 type: object 112 additionalProperties: false 113 114 patternProperties: 115 "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$": 116 $ref: samsung,pinctrl-pins-cfg.yaml 117 118 properties: 119 samsung,pins: 120 description: See samsung,pinctrl-pins-cfg.yaml 121 $ref: /schemas/types.yaml#/definitions/string-array 122 maxItems: 1 123 124 required: 125 - samsung,pins 126 127 unevaluatedProperties: false 128 129required: 130 - compatible 131 - reg 132 133allOf: 134 - $ref: pinctrl.yaml# 135 - if: 136 properties: 137 compatible: 138 contains: 139 enum: 140 - google,gs101-pinctrl 141 - samsung,exynos8890-pinctrl 142 then: 143 required: 144 - clocks 145 - clock-names 146 else: 147 properties: 148 clocks: false 149 clock-names: false 150 151 - if: 152 properties: 153 compatible: 154 contains: 155 const: samsung,exynos5433-pinctrl 156 then: 157 properties: 158 reg: 159 minItems: 1 160 maxItems: 2 161 else: 162 properties: 163 reg: 164 minItems: 1 165 maxItems: 1 166 167additionalProperties: false 168 169examples: 170 - | 171 pinctrl@7f008000 { 172 compatible = "samsung,s3c64xx-pinctrl"; 173 reg = <0x7f008000 0x1000>; 174 interrupt-parent = <&vic1>; 175 interrupts = <21>; 176 177 wakeup-interrupt-controller { 178 compatible = "samsung,s3c64xx-wakeup-eint"; 179 interrupts-extended = <&vic0 0>, 180 <&vic0 1>, 181 <&vic1 0>, 182 <&vic1 1>; 183 }; 184 185 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 186 gpa-gpio-bank { 187 gpio-controller; 188 #gpio-cells = <2>; 189 interrupt-controller; 190 #interrupt-cells = <2>; 191 }; 192 193 // ... 194 195 uart0-data-pins { 196 samsung,pins = "gpa-0", "gpa-1"; 197 samsung,pin-function = <2>; 198 samsung,pin-pud = <0>; 199 }; 200 201 // ... 202 }; 203 204 - | 205 #include <dt-bindings/interrupt-controller/arm-gic.h> 206 207 pinctrl@11400000 { 208 compatible = "samsung,exynos4210-pinctrl"; 209 reg = <0x11400000 0x1000>; 210 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 211 212 pinctrl-names = "default"; 213 pinctrl-0 = <&sleep0>; 214 215 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 216 gpa0-gpio-bank { 217 gpio-controller; 218 #gpio-cells = <2>; 219 interrupt-controller; 220 #interrupt-cells = <2>; 221 }; 222 223 // ... 224 225 uart0-data-pins { 226 samsung,pins = "gpa0-0", "gpa0-1"; 227 samsung,pin-function = <2>; 228 samsung,pin-pud = <0>; 229 samsung,pin-drv = <0>; 230 }; 231 232 // ... 233 234 sleep0: sleep-state { 235 gpa0-0-pin { 236 samsung,pins = "gpa0-0"; 237 samsung,pin-con-pdn = <2>; 238 samsung,pin-pud-pdn = <0>; 239 }; 240 241 gpa0-1-pin { 242 samsung,pins = "gpa0-1"; 243 samsung,pin-con-pdn = <0>; 244 samsung,pin-pud-pdn = <0>; 245 }; 246 247 // ... 248 }; 249 }; 250 251 - | 252 #include <dt-bindings/interrupt-controller/arm-gic.h> 253 254 pinctrl@11000000 { 255 compatible = "samsung,exynos4210-pinctrl"; 256 reg = <0x11000000 0x1000>; 257 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 258 259 wakeup-interrupt-controller { 260 compatible = "samsung,exynos4210-wakeup-eint"; 261 interrupt-parent = <&gic>; 262 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 263 }; 264 265 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 266 gpj0-gpio-bank { 267 gpio-controller; 268 #gpio-cells = <2>; 269 interrupt-controller; 270 #interrupt-cells = <2>; 271 }; 272 273 /* Pin bank without external interrupts */ 274 gpy0-gpio-bank { 275 gpio-controller; 276 #gpio-cells = <2>; 277 }; 278 279 /* Pin bank with external direct wake-up interrupts */ 280 gpx0-gpio-bank { 281 gpio-controller; 282 #gpio-cells = <2>; 283 284 interrupt-controller; 285 interrupt-parent = <&gic>; 286 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 294 #interrupt-cells = <2>; 295 }; 296 297 // ... 298 299 sd0-clk-pins { 300 samsung,pins = "gpk0-0"; 301 samsung,pin-function = <2>; 302 samsung,pin-pud = <0>; 303 samsung,pin-drv = <3>; 304 }; 305 306 sd4-bus-width8-pins { 307 part-1-pins { 308 samsung,pins = "gpk0-3", "gpk0-4", 309 "gpk0-5", "gpk0-6"; 310 samsung,pin-function = <3>; 311 samsung,pin-pud = <3>; 312 samsung,pin-drv = <3>; 313 }; 314 315 part-2-pins { 316 samsung,pins = "gpk1-3", "gpk1-4", 317 "gpk1-5", "gpk1-6"; 318 samsung,pin-function = <4>; 319 samsung,pin-pud = <3>; 320 samsung,pin-drv = <3>; 321 }; 322 }; 323 324 // ... 325 326 otg-gp-pins { 327 samsung,pins = "gpx3-3"; 328 samsung,pin-function = <1>; 329 samsung,pin-pud = <0>; 330 samsung,pin-drv = <0>; 331 samsung,pin-val = <0>; 332 }; 333 }; 334 335 - | 336 #include <dt-bindings/interrupt-controller/arm-gic.h> 337 338 pinctrl@10580000 { 339 compatible = "samsung,exynos5433-pinctrl"; 340 reg = <0x10580000 0x1a20>, <0x11090000 0x100>; 341 342 pinctrl-names = "default"; 343 pinctrl-0 = <&initial_alive>; 344 345 wakeup-interrupt-controller { 346 compatible = "samsung,exynos5433-wakeup-eint", 347 "samsung,exynos7-wakeup-eint"; 348 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 349 }; 350 351 /* Pin bank with external direct wake-up interrupts */ 352 gpa0-gpio-bank { 353 gpio-controller; 354 #gpio-cells = <2>; 355 356 interrupt-controller; 357 interrupt-parent = <&gic>; 358 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 366 #interrupt-cells = <2>; 367 }; 368 369 // ... 370 371 te-irq-pins { 372 samsung,pins = "gpf1-3"; 373 samsung,pin-function = <0xf>; 374 }; 375 376 // .. 377 378 initial_alive: initial-state { 379 gpa0-0-pin { 380 samsung,pins = "gpa0-0"; 381 samsung,pin-function = <0>; 382 samsung,pin-pud = <1>; 383 samsung,pin-drv = <0>; 384 }; 385 386 // ... 387 }; 388 }; 389 390 - | 391 #include <dt-bindings/interrupt-controller/arm-gic.h> 392 393 pinctrl@114b0000 { 394 compatible = "samsung,exynos5433-pinctrl"; 395 reg = <0x114b0000 0x1000>; 396 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 397 power-domains = <&pd_aud>; 398 399 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 400 gpz0-gpio-bank { 401 gpio-controller; 402 #gpio-cells = <2>; 403 interrupt-controller; 404 #interrupt-cells = <2>; 405 }; 406 407 // ... 408 409 i2s0-bus-pins { 410 samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3", 411 "gpz0-4", "gpz0-5", "gpz0-6"; 412 samsung,pin-function = <2>; 413 samsung,pin-pud = <0>; 414 samsung,pin-drv = <0>; 415 }; 416 417 // ... 418 }; 419