1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Pin Function Controller (GPIO and Pin Mux/Config) 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 12description: 13 The Pin Function Controller (PFC) is a Pin Mux/Config controller. 14 On SH/R-Mobile SoCs it also acts as a GPIO controller. 15 16properties: 17 compatible: 18 enum: 19 - renesas,pfc-emev2 # EMMA Mobile EV2 20 - renesas,pfc-r8a73a4 # R-Mobile APE6 21 - renesas,pfc-r8a7740 # R-Mobile A1 22 - renesas,pfc-r8a7742 # RZ/G1H 23 - renesas,pfc-r8a7743 # RZ/G1M 24 - renesas,pfc-r8a7744 # RZ/G1N 25 - renesas,pfc-r8a7745 # RZ/G1E 26 - renesas,pfc-r8a77470 # RZ/G1C 27 - renesas,pfc-r8a774a1 # RZ/G2M 28 - renesas,pfc-r8a774b1 # RZ/G2N 29 - renesas,pfc-r8a774c0 # RZ/G2E 30 - renesas,pfc-r8a774e1 # RZ/G2H 31 - renesas,pfc-r8a7778 # R-Car M1 32 - renesas,pfc-r8a7779 # R-Car H1 33 - renesas,pfc-r8a7790 # R-Car H2 34 - renesas,pfc-r8a7791 # R-Car M2-W 35 - renesas,pfc-r8a7792 # R-Car V2H 36 - renesas,pfc-r8a7793 # R-Car M2-N 37 - renesas,pfc-r8a7794 # R-Car E2 38 - renesas,pfc-r8a7795 # R-Car H3 39 - renesas,pfc-r8a7796 # R-Car M3-W 40 - renesas,pfc-r8a77961 # R-Car M3-W+ 41 - renesas,pfc-r8a77965 # R-Car M3-N 42 - renesas,pfc-r8a77970 # R-Car V3M 43 - renesas,pfc-r8a77980 # R-Car V3H 44 - renesas,pfc-r8a77990 # R-Car E3 45 - renesas,pfc-r8a77995 # R-Car D3 46 - renesas,pfc-r8a779a0 # R-Car V3U 47 - renesas,pfc-r8a779f0 # R-Car S4-8 48 - renesas,pfc-r8a779g0 # R-Car V4H 49 - renesas,pfc-r8a779h0 # R-Car V4M 50 - renesas,pfc-sh73a0 # SH-Mobile AG5 51 52 reg: 53 minItems: 1 54 maxItems: 10 55 56 gpio-controller: true 57 58 '#gpio-cells': 59 const: 2 60 61 gpio-ranges: 62 minItems: 1 63 maxItems: 16 64 65 interrupts-extended: 66 minItems: 32 67 maxItems: 64 68 description: 69 Specify the interrupts associated with external IRQ pins on SoCs where 70 the PFC acts as a GPIO controller. It must contain one interrupt per 71 external IRQ, sorted by external IRQ number. 72 73 power-domains: 74 maxItems: 1 75 76allOf: 77 - $ref: pinctrl.yaml# 78 79required: 80 - compatible 81 - reg 82 83if: 84 properties: 85 compatible: 86 enum: 87 - renesas,pfc-r8a73a4 88 - renesas,pfc-r8a7740 89 - renesas,pfc-sh73a0 90then: 91 required: 92 - interrupts-extended 93 - gpio-controller 94 - '#gpio-cells' 95 - gpio-ranges 96 - power-domains 97 98additionalProperties: 99 anyOf: 100 - type: object 101 allOf: 102 - $ref: pincfg-node.yaml# 103 - $ref: pinmux-node.yaml# 104 105 description: 106 Pin controller client devices use pin configuration subnodes (children 107 and grandchildren) for desired pin configuration. 108 Client device subnodes use below standard properties. 109 110 properties: 111 function: true 112 groups: true 113 pins: true 114 bias-disable: true 115 bias-pull-down: true 116 bias-pull-up: true 117 drive-strength: 118 enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values 119 power-source: 120 enum: [ 1800, 3300 ] 121 gpio-hog: true 122 gpios: true 123 input: true 124 output-high: true 125 output-low: true 126 127 additionalProperties: false 128 129 - type: object 130 additionalProperties: 131 $ref: "#/additionalProperties/anyOf/0" 132 133examples: 134 - | 135 pfc: pinctrl@e6050000 { 136 compatible = "renesas,pfc-r8a7740"; 137 reg = <0xe6050000 0x8000>, 138 <0xe605800c 0x20>; 139 gpio-controller; 140 #gpio-cells = <2>; 141 gpio-ranges = <&pfc 0 0 212>; 142 interrupts-extended = 143 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, 144 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, 145 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, 146 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, 147 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, 148 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, 149 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, 150 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; 151 power-domains = <&pd_c5>; 152 153 lcd0-mux-hog { 154 /* DBGMD/LCDC0/FSIA MUX */ 155 gpio-hog; 156 gpios = <176 0>; 157 output-high; 158 }; 159 }; 160 161 - | 162 pinctrl@e6060000 { 163 compatible = "renesas,pfc-r8a7795"; 164 reg = <0xe6060000 0x50c>; 165 166 avb_pins: avb { 167 mux { 168 groups = "avb_link", "avb_mdio", "avb_mii"; 169 function = "avb"; 170 }; 171 172 pins_mdio { 173 groups = "avb_mdio"; 174 drive-strength = <24>; 175 }; 176 177 pins_mii_tx { 178 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", 179 "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2", 180 "PIN_AVB_TD3"; 181 drive-strength = <12>; 182 }; 183 }; 184 185 keys_pins: keys { 186 pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1"; 187 bias-pull-up; 188 }; 189 190 sdhi0_pins: sd0 { 191 groups = "sdhi0_data4", "sdhi0_ctrl"; 192 function = "sdhi0"; 193 power-source = <3300>; 194 }; 195 }; 196