1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Pin Function Controller (GPIO and Pin Mux/Config) 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 12description: 13 The Pin Function Controller (PFC) is a Pin Mux/Config controller. 14 On SH/R-Mobile SoCs it also acts as a GPIO controller. 15 16properties: 17 compatible: 18 enum: 19 - renesas,pfc-emev2 # EMMA Mobile EV2 20 - renesas,pfc-r8a73a4 # R-Mobile APE6 21 - renesas,pfc-r8a7740 # R-Mobile A1 22 - renesas,pfc-r8a7742 # RZ/G1H 23 - renesas,pfc-r8a7743 # RZ/G1M 24 - renesas,pfc-r8a7744 # RZ/G1N 25 - renesas,pfc-r8a7745 # RZ/G1E 26 - renesas,pfc-r8a77470 # RZ/G1C 27 - renesas,pfc-r8a774a1 # RZ/G2M 28 - renesas,pfc-r8a774b1 # RZ/G2N 29 - renesas,pfc-r8a774c0 # RZ/G2E 30 - renesas,pfc-r8a774e1 # RZ/G2H 31 - renesas,pfc-r8a7778 # R-Car M1 32 - renesas,pfc-r8a7779 # R-Car H1 33 - renesas,pfc-r8a7790 # R-Car H2 34 - renesas,pfc-r8a7791 # R-Car M2-W 35 - renesas,pfc-r8a7792 # R-Car V2H 36 - renesas,pfc-r8a7793 # R-Car M2-N 37 - renesas,pfc-r8a7794 # R-Car E2 38 - renesas,pfc-r8a7795 # R-Car H3 39 - renesas,pfc-r8a7796 # R-Car M3-W 40 - renesas,pfc-r8a77961 # R-Car M3-W+ 41 - renesas,pfc-r8a77965 # R-Car M3-N 42 - renesas,pfc-r8a77970 # R-Car V3M 43 - renesas,pfc-r8a77980 # R-Car V3H 44 - renesas,pfc-r8a77990 # R-Car E3 45 - renesas,pfc-r8a77995 # R-Car D3 46 - renesas,pfc-r8a779a0 # R-Car V3U 47 - renesas,pfc-r8a779f0 # R-Car S4-8 48 - renesas,pfc-sh73a0 # SH-Mobile AG5 49 50 reg: 51 minItems: 1 52 maxItems: 10 53 54 gpio-controller: true 55 56 '#gpio-cells': 57 const: 2 58 59 gpio-ranges: 60 minItems: 1 61 maxItems: 16 62 63 interrupts-extended: 64 minItems: 32 65 maxItems: 64 66 description: 67 Specify the interrupts associated with external IRQ pins on SoCs where 68 the PFC acts as a GPIO controller. It must contain one interrupt per 69 external IRQ, sorted by external IRQ number. 70 71 power-domains: 72 maxItems: 1 73 74allOf: 75 - $ref: "pinctrl.yaml#" 76 77required: 78 - compatible 79 - reg 80 81if: 82 properties: 83 compatible: 84 enum: 85 - renesas,pfc-r8a73a4 86 - renesas,pfc-r8a7740 87 - renesas,pfc-sh73a0 88then: 89 required: 90 - interrupts-extended 91 - gpio-controller 92 - '#gpio-cells' 93 - gpio-ranges 94 - power-domains 95 96additionalProperties: 97 anyOf: 98 - type: object 99 allOf: 100 - $ref: pincfg-node.yaml# 101 - $ref: pinmux-node.yaml# 102 103 description: 104 Pin controller client devices use pin configuration subnodes (children 105 and grandchildren) for desired pin configuration. 106 Client device subnodes use below standard properties. 107 108 properties: 109 phandle: true 110 function: true 111 groups: true 112 pins: true 113 bias-disable: true 114 bias-pull-down: true 115 bias-pull-up: true 116 drive-strength: 117 enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values 118 power-source: 119 enum: [ 1800, 3300 ] 120 gpio-hog: true 121 gpios: true 122 input: true 123 output-high: true 124 output-low: true 125 126 additionalProperties: false 127 128 - type: object 129 properties: 130 phandle: true 131 132 additionalProperties: 133 $ref: "#/additionalProperties/anyOf/0" 134 135examples: 136 - | 137 pfc: pinctrl@e6050000 { 138 compatible = "renesas,pfc-r8a7740"; 139 reg = <0xe6050000 0x8000>, 140 <0xe605800c 0x20>; 141 gpio-controller; 142 #gpio-cells = <2>; 143 gpio-ranges = <&pfc 0 0 212>; 144 interrupts-extended = 145 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, 146 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, 147 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, 148 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, 149 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, 150 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, 151 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, 152 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; 153 power-domains = <&pd_c5>; 154 155 lcd0-mux-hog { 156 /* DBGMD/LCDC0/FSIA MUX */ 157 gpio-hog; 158 gpios = <176 0>; 159 output-high; 160 }; 161 }; 162 163 - | 164 pinctrl@e6060000 { 165 compatible = "renesas,pfc-r8a7795"; 166 reg = <0xe6060000 0x50c>; 167 168 avb_pins: avb { 169 mux { 170 groups = "avb_link", "avb_mdio", "avb_mii"; 171 function = "avb"; 172 }; 173 174 pins_mdio { 175 groups = "avb_mdio"; 176 drive-strength = <24>; 177 }; 178 179 pins_mii_tx { 180 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", 181 "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2", 182 "PIN_AVB_TD3"; 183 drive-strength = <12>; 184 }; 185 }; 186 187 keys_pins: keys { 188 pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1"; 189 bias-pull-up; 190 }; 191 192 sdhi0_pins: sd0 { 193 groups = "sdhi0_data4", "sdhi0_ctrl"; 194 function = "sdhi0"; 195 power-source = <3300>; 196 }; 197 }; 198