1*105c931aSTzuyi Chang# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*105c931aSTzuyi Chang# Copyright 2023 Realtek Semiconductor Corporation 3*105c931aSTzuyi Chang%YAML 1.2 4*105c931aSTzuyi Chang--- 5*105c931aSTzuyi Chang$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1619b-pinctrl.yaml# 6*105c931aSTzuyi Chang$schema: http://devicetree.org/meta-schemas/core.yaml# 7*105c931aSTzuyi Chang 8*105c931aSTzuyi Changtitle: Realtek DHC RTD1619B Pin Controller 9*105c931aSTzuyi Chang 10*105c931aSTzuyi Changmaintainers: 11*105c931aSTzuyi Chang - TY Chang <tychang@realtek.com> 12*105c931aSTzuyi Chang 13*105c931aSTzuyi Changdescription: 14*105c931aSTzuyi Chang The Realtek DHC RTD1619B is a high-definition media processor SoC. The 15*105c931aSTzuyi Chang RTD1619B pin controller is used to control pin function, pull up/down 16*105c931aSTzuyi Chang resistor, drive strength, schmitt trigger and power source. 17*105c931aSTzuyi Chang 18*105c931aSTzuyi Changproperties: 19*105c931aSTzuyi Chang compatible: 20*105c931aSTzuyi Chang const: realtek,rtd1619b-pinctrl 21*105c931aSTzuyi Chang 22*105c931aSTzuyi Chang reg: 23*105c931aSTzuyi Chang maxItems: 1 24*105c931aSTzuyi Chang 25*105c931aSTzuyi ChangpatternProperties: 26*105c931aSTzuyi Chang '-pins$': 27*105c931aSTzuyi Chang type: object 28*105c931aSTzuyi Chang allOf: 29*105c931aSTzuyi Chang - $ref: pincfg-node.yaml# 30*105c931aSTzuyi Chang - $ref: pinmux-node.yaml# 31*105c931aSTzuyi Chang 32*105c931aSTzuyi Chang properties: 33*105c931aSTzuyi Chang pins: 34*105c931aSTzuyi Chang items: 35*105c931aSTzuyi Chang enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7, 36*105c931aSTzuyi Chang gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14, 37*105c931aSTzuyi Chang gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21, 38*105c931aSTzuyi Chang gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28, 39*105c931aSTzuyi Chang gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35, 40*105c931aSTzuyi Chang hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42, 41*105c931aSTzuyi Chang gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49, 42*105c931aSTzuyi Chang gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx, 43*105c931aSTzuyi Chang gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63, 44*105c931aSTzuyi Chang gpio_64, gpio_65, gpio_66, gpio_67, gpio_68, gpio_69, gpio_70, 45*105c931aSTzuyi Chang gpio_71, gpio_72, gpio_73, gpio_74, gpio_75, gpio_76, emmc_cmd, 46*105c931aSTzuyi Chang spi_ce_n, spi_sck, spi_so, spi_si, emmc_rst_n, emmc_dd_sb, 47*105c931aSTzuyi Chang emmc_clk, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3, 48*105c931aSTzuyi Chang emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7, ur2_loc, 49*105c931aSTzuyi Chang gspi_loc, sdio_loc, hi_loc, hi_width, sf_en, arm_trace_dbg_en, 50*105c931aSTzuyi Chang pwm_01_open_drain_en_loc0, pwm_23_open_drain_en_loc0, 51*105c931aSTzuyi Chang pwm_01_open_drain_en_loc1, pwm_23_open_drain_en_loc1, 52*105c931aSTzuyi Chang ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, dmic_loc, 53*105c931aSTzuyi Chang iso_gspi_loc, ejtag_ve3_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc ] 54*105c931aSTzuyi Chang 55*105c931aSTzuyi Chang function: 56*105c931aSTzuyi Chang enum: [ gpio, nf, nf_spi, spi, pmic, spdif, spdif_coaxial, spdif_optical_loc0, 57*105c931aSTzuyi Chang spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1, 58*105c931aSTzuyi Chang gspi_loc1, iso_gspi_loc1, i2c0, i2c1, i2c3, i2c4, i2c5, pwm0, pwm1, pwm2, 59*105c931aSTzuyi Chang pwm3, etn_led, etn_phy, etn_clk, sc0, vfd, gspi_loc0, iso_gspi_loc0, pcie1, 60*105c931aSTzuyi Chang pcie2, sd, sdio_loc0, sdio_loc1, hi, hi_m, dc_fan, pll_test_loc0, pll_test_loc1, 61*105c931aSTzuyi Chang usb_cc1, usb_cc2, ir_rx, tdm_ai_loc0, tdm_ai_loc1, dmic_loc0, dmic_loc1, 62*105c931aSTzuyi Chang ai_loc0, ai_loc1, tp0, tp1, ao, uart2_disable, gspi_disable, sdio_disable, 63*105c931aSTzuyi Chang hi_loc_disable, hi_loc0, hi_width_disable, hi_width_1bit, vtc_i2si_loc0, 64*105c931aSTzuyi Chang vtc_tdm_loc0, vtc_dmic_loc0, vtc_i2si_loc1, vtc_tdm_loc1, vtc_dmic_loc1, 65*105c931aSTzuyi Chang vtc_i2so, ve3_ejtag_loc0, aucpu0_ejtag_loc0, aucpu1_ejtag_loc0, ve3_ejtag_loc1, 66*105c931aSTzuyi Chang aucpu0_ejtag_loc1, aucpu1_ejtag_loc1, ve3_ejtag_loc2, aucpu0_ejtag_loc2, 67*105c931aSTzuyi Chang aucpu1_ejtag_loc2, scpu_ejtag_loc0, acpu_ejtag_loc0, vcpu_ejtag_loc0, 68*105c931aSTzuyi Chang scpu_ejtag_loc1, acpu_ejtag_loc1, vcpu_ejtag_loc1, scpu_ejtag_loc2, 69*105c931aSTzuyi Chang acpu_ejtag_loc2, vcpu_ejtag_loc2, ve3_ejtag_disable, aucpu0_ejtag_disable, 70*105c931aSTzuyi Chang aucpu1_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable, 71*105c931aSTzuyi Chang scpu_ejtag_disable, iso_gspi_disable, sf_disable, sf_enable, 72*105c931aSTzuyi Chang arm_trace_debug_disable, arm_trace_debug_enable, pwm_normal, pwm_open_drain, 73*105c931aSTzuyi Chang standby_dbg, test_loop_dis ] 74*105c931aSTzuyi Chang 75*105c931aSTzuyi Chang drive-strength: 76*105c931aSTzuyi Chang enum: [4, 8] 77*105c931aSTzuyi Chang 78*105c931aSTzuyi Chang bias-pull-down: true 79*105c931aSTzuyi Chang 80*105c931aSTzuyi Chang bias-pull-up: true 81*105c931aSTzuyi Chang 82*105c931aSTzuyi Chang bias-disable: true 83*105c931aSTzuyi Chang 84*105c931aSTzuyi Chang input-schmitt-enable: true 85*105c931aSTzuyi Chang 86*105c931aSTzuyi Chang input-schmitt-disable: true 87*105c931aSTzuyi Chang 88*105c931aSTzuyi Chang drive-push-pull: true 89*105c931aSTzuyi Chang 90*105c931aSTzuyi Chang power-source: 91*105c931aSTzuyi Chang description: | 92*105c931aSTzuyi Chang Valid arguments are described as below: 93*105c931aSTzuyi Chang 0: power supply of 1.8V 94*105c931aSTzuyi Chang 1: power supply of 3.3V 95*105c931aSTzuyi Chang enum: [0, 1] 96*105c931aSTzuyi Chang 97*105c931aSTzuyi Chang realtek,drive-strength-p: 98*105c931aSTzuyi Chang description: | 99*105c931aSTzuyi Chang Some of pins can be driven using the P-MOS and N-MOS transistor to 100*105c931aSTzuyi Chang achieve finer adjustments. The block-diagram representation is as 101*105c931aSTzuyi Chang follows: 102*105c931aSTzuyi Chang VDD 103*105c931aSTzuyi Chang | 104*105c931aSTzuyi Chang ||--+ 105*105c931aSTzuyi Chang +-----o|| P-MOS-FET 106*105c931aSTzuyi Chang | ||--+ 107*105c931aSTzuyi Chang IN --+ +----- out 108*105c931aSTzuyi Chang | ||--+ 109*105c931aSTzuyi Chang +------|| N-MOS-FET 110*105c931aSTzuyi Chang ||--+ 111*105c931aSTzuyi Chang | 112*105c931aSTzuyi Chang GND 113*105c931aSTzuyi Chang The driving strength of the P-MOS/N-MOS transistors impacts the 114*105c931aSTzuyi Chang waveform's rise/fall times. Greater driving strength results in 115*105c931aSTzuyi Chang shorter rise/fall times. Each P-MOS and N-MOS transistor offers 116*105c931aSTzuyi Chang 8 configurable levels (0 to 7), with higher values indicating 117*105c931aSTzuyi Chang greater driving strength, contributing to achieving the desired 118*105c931aSTzuyi Chang speed. 119*105c931aSTzuyi Chang 120*105c931aSTzuyi Chang The realtek,drive-strength-p is used to control the driving strength 121*105c931aSTzuyi Chang of the P-MOS output. 122*105c931aSTzuyi Chang $ref: /schemas/types.yaml#/definitions/uint32 123*105c931aSTzuyi Chang minimum: 0 124*105c931aSTzuyi Chang maximum: 7 125*105c931aSTzuyi Chang 126*105c931aSTzuyi Chang realtek,drive-strength-n: 127*105c931aSTzuyi Chang description: | 128*105c931aSTzuyi Chang Similar to the realtek,drive-strength-p, the realtek,drive-strength-n 129*105c931aSTzuyi Chang is used to control the driving strength of the N-MOS output. 130*105c931aSTzuyi Chang $ref: /schemas/types.yaml#/definitions/uint32 131*105c931aSTzuyi Chang minimum: 0 132*105c931aSTzuyi Chang maximum: 7 133*105c931aSTzuyi Chang 134*105c931aSTzuyi Chang realtek,duty-cycle: 135*105c931aSTzuyi Chang description: | 136*105c931aSTzuyi Chang An integer describing the level to adjust output duty cycle, controlling 137*105c931aSTzuyi Chang the proportion of positive and negative waveforms in nanoseconds. 138*105c931aSTzuyi Chang Valid arguments are described as below: 139*105c931aSTzuyi Chang 0: 0ns 140*105c931aSTzuyi Chang 2: + 0.25ns 141*105c931aSTzuyi Chang 3: + 0.5ns 142*105c931aSTzuyi Chang 4: -0.25ns 143*105c931aSTzuyi Chang 5: -0.5ns 144*105c931aSTzuyi Chang $ref: /schemas/types.yaml#/definitions/uint32 145*105c931aSTzuyi Chang enum: [ 0, 2, 3, 4, 5 ] 146*105c931aSTzuyi Chang 147*105c931aSTzuyi Chang required: 148*105c931aSTzuyi Chang - pins 149*105c931aSTzuyi Chang 150*105c931aSTzuyi Chang additionalProperties: false 151*105c931aSTzuyi Chang 152*105c931aSTzuyi Changrequired: 153*105c931aSTzuyi Chang - compatible 154*105c931aSTzuyi Chang - reg 155*105c931aSTzuyi Chang 156*105c931aSTzuyi ChangadditionalProperties: false 157*105c931aSTzuyi Chang 158*105c931aSTzuyi Changexamples: 159*105c931aSTzuyi Chang - | 160*105c931aSTzuyi Chang pinctrl@4e000 { 161*105c931aSTzuyi Chang compatible = "realtek,rtd1619b-pinctrl"; 162*105c931aSTzuyi Chang reg = <0x4e000 0x130>; 163*105c931aSTzuyi Chang 164*105c931aSTzuyi Chang emmc-hs200-pins { 165*105c931aSTzuyi Chang pins = "emmc_clk", 166*105c931aSTzuyi Chang "emmc_cmd", 167*105c931aSTzuyi Chang "emmc_data_0", 168*105c931aSTzuyi Chang "emmc_data_1", 169*105c931aSTzuyi Chang "emmc_data_2", 170*105c931aSTzuyi Chang "emmc_data_3", 171*105c931aSTzuyi Chang "emmc_data_4", 172*105c931aSTzuyi Chang "emmc_data_5", 173*105c931aSTzuyi Chang "emmc_data_6", 174*105c931aSTzuyi Chang "emmc_data_7"; 175*105c931aSTzuyi Chang function = "emmc"; 176*105c931aSTzuyi Chang realtek,drive-strength-p = <0x2>; 177*105c931aSTzuyi Chang realtek,drive-strength-n = <0x2>; 178*105c931aSTzuyi Chang }; 179*105c931aSTzuyi Chang 180*105c931aSTzuyi Chang i2c-0-pins { 181*105c931aSTzuyi Chang pins = "gpio_12", 182*105c931aSTzuyi Chang "gpio_13"; 183*105c931aSTzuyi Chang function = "i2c0"; 184*105c931aSTzuyi Chang drive-strength = <4>; 185*105c931aSTzuyi Chang }; 186*105c931aSTzuyi Chang }; 187