xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM8250 SoC LPASS LPI TLMM
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12description:
13  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14  (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
15
16properties:
17  compatible:
18    const: qcom,sm8250-lpass-lpi-pinctrl
19
20  reg:
21    maxItems: 2
22
23  clocks:
24    items:
25      - description: LPASS Core voting clock
26      - description: LPASS Audio voting clock
27
28  clock-names:
29    items:
30      - const: core
31      - const: audio
32
33patternProperties:
34  "-state$":
35    oneOf:
36      - $ref: "#/$defs/qcom-sm8250-lpass-state"
37      - patternProperties:
38          "-pins$":
39            $ref: "#/$defs/qcom-sm8250-lpass-state"
40        additionalProperties: false
41
42$defs:
43  qcom-sm8250-lpass-state:
44    type: object
45    description:
46      Pinctrl node's client devices use subnodes for desired pin configuration.
47      Client device subnodes use below standard properties.
48    $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
49    unevaluatedProperties: false
50
51    properties:
52      pins:
53        description:
54          List of gpio pins affected by the properties specified in this
55          subnode.
56        items:
57          oneOf:
58            - pattern: "^gpio([0-9]|1[0-3])$"
59        minItems: 1
60        maxItems: 14
61
62      function:
63        enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws,
64                qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk,
65                dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,
66                i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk,
67                dmic3_data, i2s2_data ]
68        description:
69          Specify the alternative function to be configured for the specified
70          pins.
71
72allOf:
73  - $ref: qcom,lpass-lpi-common.yaml#
74
75required:
76  - compatible
77  - reg
78  - clocks
79  - clock-names
80
81unevaluatedProperties: false
82
83examples:
84  - |
85    #include <dt-bindings/sound/qcom,q6afe.h>
86    lpi_tlmm: pinctrl@33c0000 {
87        compatible = "qcom,sm8250-lpass-lpi-pinctrl";
88        reg = <0x33c0000 0x20000>,
89              <0x3550000 0x10000>;
90        clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
91                 <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
92        clock-names = "core", "audio";
93        gpio-controller;
94        #gpio-cells = <2>;
95        gpio-ranges = <&lpi_tlmm 0 0 14>;
96
97        wsa-swr-active-state {
98            clk-pins {
99                pins = "gpio10";
100                function = "wsa_swr_clk";
101                drive-strength = <2>;
102                slew-rate = <1>;
103                bias-disable;
104            };
105
106            data-pins {
107                pins = "gpio11";
108                function = "wsa_swr_data";
109                drive-strength = <2>;
110                slew-rate = <1>;
111            };
112        };
113
114        tx-swr-sleep-clk-state {
115            pins = "gpio0";
116            function = "swr_tx_clk";
117            drive-strength = <2>;
118            bias-pull-down;
119        };
120    };
121