xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml (revision 9f2c9170934eace462499ba0bfe042cc72900173) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sc7180-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SC7180 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm SC7180 SoC.
15
16properties:
17  compatible:
18    const: qcom,sc7180-pinctrl
19
20  reg:
21    maxItems: 3
22
23  reg-names:
24    items:
25      - const: west
26      - const: north
27      - const: south
28
29  interrupts: true
30  interrupt-controller: true
31  "#interrupt-cells": true
32  gpio-controller: true
33  "#gpio-cells": true
34  gpio-ranges: true
35  wakeup-parent: true
36
37  gpio-reserved-ranges:
38    minItems: 1
39    maxItems: 60
40
41  gpio-line-names:
42    maxItems: 119
43
44patternProperties:
45  "-state$":
46    oneOf:
47      - $ref: "#/$defs/qcom-sc7180-tlmm-state"
48      - patternProperties:
49          "-pins$":
50            $ref: "#/$defs/qcom-sc7180-tlmm-state"
51        additionalProperties: false
52
53$defs:
54  qcom-sc7180-tlmm-state:
55    type: object
56    description:
57      Pinctrl node's client devices use subnodes for desired pin configuration.
58      Client device subnodes use below standard properties.
59    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60
61    properties:
62      pins:
63        description:
64          List of gpio pins affected by the properties specified in this
65          subnode.
66        items:
67          oneOf:
68            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
69            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
70                      sdc2_cmd, sdc2_data, ufs_reset ]
71        minItems: 1
72        maxItems: 36
73
74      function:
75        description:
76          Specify the alternative function to be configured for the specified
77          pins.
78
79        enum: [ adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,
80                atest_char1, atest_char2, atest_char3, atest_tsens,
81                atest_tsens2, atest_usb1, atest_usb10, atest_usb11,
82                atest_usb12, atest_usb13, atest_usb2, atest_usb20, atest_usb21,
83                atest_usb22, atest_usb23, audio_ref, btfm_slimbus, cam_mclk,
84                cci_async, cci_i2c, cci_timer0, cci_timer1, cci_timer2,
85                cci_timer3, cci_timer4, cri_trng, dbg_out, ddr_bist, ddr_pxi0,
86                ddr_pxi1, ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1,
87                gcc_gp2, gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,
88                jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,
89                mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0, mi2s_1,
90                mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag, PLL_BIST,
91                pll_bypassnl, pll_reset, prng_rosc, qdss, qdss_cti,
92                qlink_enable, qlink_request, qspi_clk, qspi_cs, qspi_data,
93                qup00, qup01, qup02_i2c, qup02_uart, qup03, qup04_i2c,
94                qup04_uart, qup05, qup10, qup11_i2c, qup11_uart, qup12,
95                qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb, sdc2_tb,
96                sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3,
97                tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt, usb_phy, vfr_1,
98                _V_GPIO, _V_PPS_IN, _V_PPS_OUT, vsense_trigger, wlan1_adc0,
99                wlan1_adc1, wlan2_adc0, wlan2_adc1 ]
100
101      bias-pull-down: true
102      bias-pull-up: true
103      bias-disable: true
104      drive-strength: true
105      input-enable: true
106      output-high: true
107      output-low: true
108
109    required:
110      - pins
111
112    additionalProperties: false
113
114allOf:
115  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
116
117required:
118  - compatible
119  - reg
120  - reg-names
121
122additionalProperties: false
123
124examples:
125  - |
126    #include <dt-bindings/interrupt-controller/arm-gic.h>
127
128    tlmm: pinctrl@3500000 {
129        compatible = "qcom,sc7180-pinctrl";
130        reg = <0x03500000 0x300000>,
131              <0x03900000 0x300000>,
132              <0x03d00000 0x300000>;
133        reg-names = "west", "north", "south";
134        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
135        gpio-controller;
136        #gpio-cells = <2>;
137        interrupt-controller;
138        #interrupt-cells = <2>;
139        gpio-ranges = <&tlmm 0 0 120>;
140        wakeup-parent = <&pdc>;
141
142        dp_hot_plug_det: dp-hot-plug-det-state {
143            pins = "gpio117";
144            function = "dp_hot";
145        };
146
147        qup_spi11_cs_gpio: qup-spi11-cs-gpio-state {
148            spi-pins {
149                pins = "gpio53", "gpio54", "gpio55";
150                function = "qup15";
151            };
152
153            cs-pins {
154                pins = "gpio56";
155                function = "gpio";
156            };
157        };
158    };
159