xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml (revision 2d32fba02e0e5b67fb3a4ea51dde80c0db83f1c1) 
1*57785359SJingyi Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*57785359SJingyi Wang%YAML 1.2
3*57785359SJingyi Wang---
4*57785359SJingyi Wang$id: http://devicetree.org/schemas/pinctrl/qcom,qcs8300-tlmm.yaml#
5*57785359SJingyi Wang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*57785359SJingyi Wang
7*57785359SJingyi Wangtitle: Qualcomm Technologies, Inc. QCS8300 TLMM block
8*57785359SJingyi Wang
9*57785359SJingyi Wangmaintainers:
10*57785359SJingyi Wang  - Jingyi Wang <quic_jingyw@quicinc.com>
11*57785359SJingyi Wang
12*57785359SJingyi Wangdescription: |
13*57785359SJingyi Wang  Top Level Mode Multiplexer pin controller in Qualcomm QCS8300 SoC.
14*57785359SJingyi Wang
15*57785359SJingyi WangallOf:
16*57785359SJingyi Wang  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17*57785359SJingyi Wang
18*57785359SJingyi Wangproperties:
19*57785359SJingyi Wang  compatible:
20*57785359SJingyi Wang    const: qcom,qcs8300-tlmm
21*57785359SJingyi Wang
22*57785359SJingyi Wang  reg:
23*57785359SJingyi Wang    maxItems: 1
24*57785359SJingyi Wang
25*57785359SJingyi Wang  interrupts:
26*57785359SJingyi Wang    maxItems: 1
27*57785359SJingyi Wang
28*57785359SJingyi Wang  gpio-reserved-ranges:
29*57785359SJingyi Wang    minItems: 1
30*57785359SJingyi Wang    maxItems: 67
31*57785359SJingyi Wang
32*57785359SJingyi Wang  gpio-line-names:
33*57785359SJingyi Wang    maxItems: 133
34*57785359SJingyi Wang
35*57785359SJingyi WangpatternProperties:
36*57785359SJingyi Wang  "-state$":
37*57785359SJingyi Wang    oneOf:
38*57785359SJingyi Wang      - $ref: "#/$defs/qcom-qcs8300-tlmm-state"
39*57785359SJingyi Wang      - patternProperties:
40*57785359SJingyi Wang          "-pins$":
41*57785359SJingyi Wang            $ref: "#/$defs/qcom-qcs8300-tlmm-state"
42*57785359SJingyi Wang        additionalProperties: false
43*57785359SJingyi Wang
44*57785359SJingyi Wang$defs:
45*57785359SJingyi Wang  qcom-qcs8300-tlmm-state:
46*57785359SJingyi Wang    type: object
47*57785359SJingyi Wang    description:
48*57785359SJingyi Wang      Pinctrl node's client devices use subnodes for desired pin configuration.
49*57785359SJingyi Wang      Client device subnodes use below standard properties.
50*57785359SJingyi Wang    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51*57785359SJingyi Wang    unevaluatedProperties: false
52*57785359SJingyi Wang
53*57785359SJingyi Wang    properties:
54*57785359SJingyi Wang      pins:
55*57785359SJingyi Wang        description:
56*57785359SJingyi Wang          List of gpio pins affected by the properties specified in this
57*57785359SJingyi Wang          subnode.
58*57785359SJingyi Wang        items:
59*57785359SJingyi Wang          oneOf:
60*57785359SJingyi Wang            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$"
61*57785359SJingyi Wang            - enum: [ ufs_reset, sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data ]
62*57785359SJingyi Wang        minItems: 1
63*57785359SJingyi Wang        maxItems: 36
64*57785359SJingyi Wang
65*57785359SJingyi Wang      function:
66*57785359SJingyi Wang        description:
67*57785359SJingyi Wang          Specify the alternative function to be configured for the specified
68*57785359SJingyi Wang          pins.
69*57785359SJingyi Wang
70*57785359SJingyi Wang        enum: [ aoss_cti, atest_char, atest_usb2, audio_ref, cam_mclk,
71*57785359SJingyi Wang                cci_async, cci_i2c_scl, cci_i2c_sda, cci_timer, cri_trng,
72*57785359SJingyi Wang                dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3,
73*57785359SJingyi Wang                edp0_hot, edp0_lcd, edp1_lcd, egpio, emac0_mcg0, emac0_mcg1,
74*57785359SJingyi Wang                emac0_mcg2, emac0_mcg3, emac0_mdc, emac0_mdio, emac0_ptp_aux,
75*57785359SJingyi Wang                emac0_ptp_pps, gcc_gp1, gcc_gp2, gcc_gp3, gcc_gp4, gcc_gp5,
76*57785359SJingyi Wang                gpio, hs0_mi2s, hs1_mi2s, hs2_mi2s, ibi_i3c, jitter_bist,
77*57785359SJingyi Wang                mdp0_vsync0, mdp0_vsync1, mdp0_vsync3, mdp0_vsync6, mdp0_vsync7,
78*57785359SJingyi Wang                mdp_vsync, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,
79*57785359SJingyi Wang                mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0,
80*57785359SJingyi Wang                mi2s_mclk1, pcie0_clkreq, pcie1_clkreq, phase_flag, pll_bist,
81*57785359SJingyi Wang                pll_clk, prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3,
82*57785359SJingyi Wang                qdss_cti, qdss_gpio, qup0_se0, qup0_se1, qup0_se2, qup0_se3,
83*57785359SJingyi Wang                qup0_se4, qup0_se5, qup0_se6, qup0_se7, qup1_se0, qup1_se1,
84*57785359SJingyi Wang                qup1_se2, qup1_se3, qup1_se4, qup1_se5, qup1_se6, qup1_se7,
85*57785359SJingyi Wang                qup2_se0, sailss_emac0, sailss_ospi, sail_top, sgmii_phy,
86*57785359SJingyi Wang                tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,
87*57785359SJingyi Wang                tsense_pwm2, tsense_pwm3, tsense_pwm4, usb2phy_ac,
88*57785359SJingyi Wang                vsense_trigger ]
89*57785359SJingyi Wang
90*57785359SJingyi Wang    required:
91*57785359SJingyi Wang      - pins
92*57785359SJingyi Wang
93*57785359SJingyi Wangrequired:
94*57785359SJingyi Wang  - compatible
95*57785359SJingyi Wang  - reg
96*57785359SJingyi Wang
97*57785359SJingyi WangunevaluatedProperties: false
98*57785359SJingyi Wang
99*57785359SJingyi Wangexamples:
100*57785359SJingyi Wang  - |
101*57785359SJingyi Wang    #include <dt-bindings/interrupt-controller/arm-gic.h>
102*57785359SJingyi Wang
103*57785359SJingyi Wang    tlmm: pinctrl@f100000 {
104*57785359SJingyi Wang        compatible = "qcom,qcs8300-tlmm";
105*57785359SJingyi Wang        reg = <0x0f100000 0x300000>;
106*57785359SJingyi Wang        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
107*57785359SJingyi Wang        gpio-controller;
108*57785359SJingyi Wang        #gpio-cells = <2>;
109*57785359SJingyi Wang        gpio-ranges = <&tlmm 0 0 133>;
110*57785359SJingyi Wang        interrupt-controller;
111*57785359SJingyi Wang        #interrupt-cells = <2>;
112*57785359SJingyi Wang
113*57785359SJingyi Wang        qup-uart7-state {
114*57785359SJingyi Wang            pins = "gpio43", "gpio44";
115*57785359SJingyi Wang            function = "qup0_se7";
116*57785359SJingyi Wang        };
117*57785359SJingyi Wang    };
118*57785359SJingyi Wang...
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