xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,qcs404-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QCS404 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm QCS404 SoC.
15
16properties:
17  compatible:
18    const: qcom,qcs404-pinctrl
19
20  reg:
21    maxItems: 3
22
23  reg-names:
24    items:
25      - const: south
26      - const: north
27      - const: east
28
29  interrupts:
30    maxItems: 1
31
32  gpio-reserved-ranges:
33    minItems: 1
34    maxItems: 60
35
36  gpio-line-names:
37    maxItems: 120
38
39patternProperties:
40  "-state$":
41    oneOf:
42      - $ref: "#/$defs/qcom-qcs404-tlmm-state"
43      - patternProperties:
44          "-pins$":
45            $ref: "#/$defs/qcom-qcs404-tlmm-state"
46        additionalProperties: false
47
48$defs:
49  qcom-qcs404-tlmm-state:
50    type: object
51    description:
52      Pinctrl node's client devices use subnodes for desired pin configuration.
53      Client device subnodes use below standard properties.
54    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
55    unevaluatedProperties: false
56
57    properties:
58      pins:
59        description:
60          List of gpio pins affected by the properties specified in this
61          subnode.
62        items:
63          oneOf:
64            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9])$"
65            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
66                      sdc2_cmd, sdc2_data, ufs_reset ]
67        minItems: 1
68        maxItems: 36
69
70      function:
71        description:
72          Specify the alternative function to be configured for the specified
73          pins.
74
75        enum: [ gpio, adsp_ext, atest_char, atest_char0, atest_char1,
76                atest_char2, atest_char3, aud_cdc, audio_ts, bimc_dte0,
77                bimc_dte1, blsp_i2c0, blsp_i2c1, blsp_i2c3, blsp_i2c4,
78                blsp_i2c5, blsp_i2c_scl_a2, blsp_i2c_scl_b2, blsp_i2c_sda_a2,
79                blsp_i2c_sda_b2, blsp_spi0, blsp_spi2, blsp_spi3, blsp_spi4,
80                blsp_spi5, blsp_spi_clk_a1, blsp_spi_clk_b1, blsp_spi_cs_n_a1,
81                blsp_spi_cs_n_b1, blsp_spi_miso_a1, blsp_spi_miso_b1,
82                blsp_spi_mosi_a1, blsp_spi_mosi_b1, blsp_uart0, blsp_uart1,
83                blsp_uart2, blsp_uart3, blsp_uart5, blsp_uart_rx_a2,
84                blsp_uart_rx_b2, blsp_uart_tx_a2, blsp_uart_tx_b2, cri_trng,
85                cri_trng0, cri_trng1, dbg_out, dsd_clk_a, dsd_clk_b, ebi2_a,
86                ebi2_lcd, ebi_cdc, ebi_ch0, ext_lpass, ext_mclk0, ext_mclk1_a,
87                ext_mclk1_b, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
88                gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gcc_plltest,
89                gcc_tlmm, hdmi_ddc, hdmi_dtest, hdmi_lbk0, hdmi_lbk1,
90                hdmi_lbk2, hdmi_lbk3, hdmi_lbk4, hdmi_lbk5, hdmi_lbk6,
91                hdmi_lbk7, hdmi_lbk8, hdmi_lbk9, hdmi_pixel, hdmi_rcv, hdmi_tx,
92                i2s_1, i2s_2, i2s_3_data0_a, i2s_3_data0_b, i2s_3_data1_a,
93                i2s_3_data1_b, i2s_3_data2_a, i2s_3_data2_b, i2s_3_data3_a,
94                i2s_3_data3_b, i2s_3_sck_a, i2s_3_sck_b, i2s_3_ws_a,
95                i2s_3_ws_b, i2s_4, ir_in, ldo_en, ldo_update, mclk_in1,
96                mclk_in2, m_voc, nfc_dwl, nfc_irq, pcie_clk, pll_bist,
97                prng_rosc, pwm_led1, pwm_led10, pwm_led11, pwm_led12,
98                pwm_led13, pwm_led14, pwm_led15, pwm_led16, pwm_led17,
99                pwm_led18, pwm_led19, pwm_led2, pwm_led20, pwm_led21,
100                pwm_led22, pwm_led23, pwm_led24, pwm_led3, pwm_led4, pwm_led5,
101                pwm_led6, pwm_led7, pwm_led8, pwm_led9, qdss_cti_trig_in_a0,
102                qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,
103                qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,
104                qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,
105                qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
106                qdss_tracedata_a, qdss_tracedata_b, rgb_clk, rgb_data0,
107                rgb_data1, rgb_data2, rgb_data3, rgb_data4, rgb_data5,
108                rgb_data6, rgb_data7, rgb_data_b0, rgb_data_b1, rgb_data_b2,
109                rgb_data_b3, rgb_data_b4, rgb_data_b5, rgb_data_b6,
110                rgb_data_b7, rgb_de, rgb_hsync, rgb_mdp, rgb_vsync, rgmi_dll1,
111                rgmi_dll2, rgmii_ck, rgmii_ctl, rgmii_int, rgmii_mdc,
112                rgmii_mdio, rgmii_rx, rgmii_tx, rgmii_wol, sd_write,
113                spdifrx_opt, spi_lcd, spkr_dac0, wlan1_adc0, wlan1_adc1,
114                wlan2_adc0, wlan2_adc1, wsa_en ]
115
116    required:
117      - pins
118
119allOf:
120  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
121
122required:
123  - compatible
124  - reg
125
126unevaluatedProperties: false
127
128examples:
129  - |
130    #include <dt-bindings/interrupt-controller/arm-gic.h>
131
132    tlmm: pinctrl@1000000 {
133        compatible = "qcom,qcs404-pinctrl";
134        reg = <0x01000000 0x200000>,
135              <0x01300000 0x200000>,
136              <0x07b00000 0x200000>;
137        reg-names = "south", "north", "east";
138        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
139        gpio-ranges = <&tlmm 0 0 120>;
140        gpio-controller;
141        #gpio-cells = <2>;
142        interrupt-controller;
143        #interrupt-cells = <2>;
144
145
146        blsp1-i2c1-default-state {
147            pins = "gpio24", "gpio25";
148            function = "blsp_i2c1";
149        };
150
151        blsp1-i2c2-default-state {
152            sda-pins {
153                pins = "gpio19";
154                function = "blsp_i2c_sda_a2";
155            };
156
157            scl-pins {
158                pins = "gpio20";
159                function = "blsp_i2c_scl_a2";
160            };
161        };
162    };
163