1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8916-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm MSM8916 TLMM pin controller 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 12 13description: 14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8916 SoC. 15 16properties: 17 compatible: 18 const: qcom,msm8916-pinctrl 19 20 reg: 21 maxItems: 1 22 23 interrupts: true 24 interrupt-controller: true 25 "#interrupt-cells": true 26 gpio-controller: true 27 "#gpio-cells": true 28 gpio-ranges: true 29 wakeup-parent: true 30 31 gpio-reserved-ranges: 32 minItems: 1 33 maxItems: 61 34 35 gpio-line-names: 36 maxItems: 122 37 38patternProperties: 39 "-state$": 40 oneOf: 41 - $ref: "#/$defs/qcom-msm8916-tlmm-state" 42 - patternProperties: 43 "-pins$": 44 $ref: "#/$defs/qcom-msm8916-tlmm-state" 45 additionalProperties: false 46 47$defs: 48 qcom-msm8916-tlmm-state: 49 type: object 50 description: 51 Pinctrl node's client devices use subnodes for desired pin configuration. 52 Client device subnodes use below standard properties. 53 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 54 55 properties: 56 pins: 57 description: 58 List of gpio pins affected by the properties specified in this 59 subnode. 60 items: 61 oneOf: 62 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[01])$" 63 - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2, 64 qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, 65 sdc2_cmd, sdc2_data ] 66 minItems: 1 67 maxItems: 36 68 69 function: 70 description: 71 Specify the alternative function to be configured for the specified 72 pins. 73 74 enum: [ gpio, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, 75 atest_char0, atest_char1, atest_char2, atest_char3, 76 atest_combodac, atest_gpsadc0, atest_gpsadc1, atest_tsens, 77 atest_wlan0, atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, 78 blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, 79 blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, 80 blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, 81 blsp_spi2_cs3, blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2, 82 blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_uart1, 83 blsp_uart2, blsp_uim1, blsp_uim2, cam1_rst, cam1_standby, 84 cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0, 85 cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, 86 display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, 87 euro_us, ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, 88 gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, 89 gsm0_tx0, gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, 90 kpsns1, kpsns2, ldo_en, ldo_update, mag_int, mdp_vsync, 91 modem_tsync, m_voc, nav_pps, nav_tsync, pa_indicator, pbs0, 92 pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc, 93 pwr_crypto_enabled_a, pwr_crypto_enabled_b, 94 pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a, 95 pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, 96 qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, 97 qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, 98 qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, 99 qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, reset_n, 100 sd_card, sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, 101 uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, 102 webcam1_rst ] 103 104 bias-pull-down: true 105 bias-pull-up: true 106 bias-disable: true 107 drive-strength: true 108 input-enable: true 109 output-high: true 110 output-low: true 111 112 required: 113 - pins 114 115 additionalProperties: false 116 117allOf: 118 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 119 120required: 121 - compatible 122 - reg 123 124additionalProperties: false 125 126examples: 127 - | 128 #include <dt-bindings/interrupt-controller/arm-gic.h> 129 130 msmgpio: pinctrl@1000000 { 131 compatible = "qcom,msm8916-pinctrl"; 132 reg = <0x01000000 0x300000>; 133 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 134 gpio-controller; 135 gpio-ranges = <&msmgpio 0 0 122>; 136 #gpio-cells = <2>; 137 interrupt-controller; 138 #interrupt-cells = <2>; 139 140 blsp1-uart2-sleep-state { 141 pins = "gpio4", "gpio5"; 142 function = "gpio"; 143 144 drive-strength = <2>; 145 bias-pull-down; 146 }; 147 148 spi1-default-state { 149 spi-pins { 150 pins = "gpio0", "gpio1", "gpio3"; 151 function = "blsp_spi1"; 152 153 drive-strength = <12>; 154 bias-disable; 155 }; 156 157 cs-pins { 158 pins = "gpio2"; 159 function = "gpio"; 160 161 drive-strength = <16>; 162 bias-disable; 163 output-high; 164 }; 165 }; 166 }; 167