xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,maili-tlmm.yaml (revision cf9610f9116d55c5a66ef9f1faecacabd93a9322) 
1*e95f2b21SJingyi Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*e95f2b21SJingyi Wang%YAML 1.2
3*e95f2b21SJingyi Wang---
4*e95f2b21SJingyi Wang$id: http://devicetree.org/schemas/pinctrl/qcom,maili-tlmm.yaml#
5*e95f2b21SJingyi Wang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*e95f2b21SJingyi Wang
7*e95f2b21SJingyi Wangtitle: Qualcomm Technologies, Inc. Maili TLMM block
8*e95f2b21SJingyi Wang
9*e95f2b21SJingyi Wangmaintainers:
10*e95f2b21SJingyi Wang  - Jingyi Wang <jingyi.wang@oss.qualcomm.com>
11*e95f2b21SJingyi Wang
12*e95f2b21SJingyi Wangdescription:
13*e95f2b21SJingyi Wang  Top Level Mode Multiplexer pin controller in Qualcomm Maili SoC.
14*e95f2b21SJingyi Wang
15*e95f2b21SJingyi WangallOf:
16*e95f2b21SJingyi Wang  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17*e95f2b21SJingyi Wang
18*e95f2b21SJingyi Wangproperties:
19*e95f2b21SJingyi Wang  compatible:
20*e95f2b21SJingyi Wang    const: qcom,maili-tlmm
21*e95f2b21SJingyi Wang
22*e95f2b21SJingyi Wang  reg:
23*e95f2b21SJingyi Wang    maxItems: 1
24*e95f2b21SJingyi Wang
25*e95f2b21SJingyi Wang  interrupts:
26*e95f2b21SJingyi Wang    maxItems: 1
27*e95f2b21SJingyi Wang
28*e95f2b21SJingyi Wang  gpio-reserved-ranges:
29*e95f2b21SJingyi Wang    minItems: 1
30*e95f2b21SJingyi Wang    maxItems: 113
31*e95f2b21SJingyi Wang
32*e95f2b21SJingyi Wang  gpio-line-names:
33*e95f2b21SJingyi Wang    maxItems: 226
34*e95f2b21SJingyi Wang
35*e95f2b21SJingyi WangpatternProperties:
36*e95f2b21SJingyi Wang  "-state$":
37*e95f2b21SJingyi Wang    oneOf:
38*e95f2b21SJingyi Wang      - $ref: "#/$defs/qcom-maili-tlmm-state"
39*e95f2b21SJingyi Wang      - patternProperties:
40*e95f2b21SJingyi Wang          "-pins$":
41*e95f2b21SJingyi Wang            $ref: "#/$defs/qcom-maili-tlmm-state"
42*e95f2b21SJingyi Wang        additionalProperties: false
43*e95f2b21SJingyi Wang
44*e95f2b21SJingyi Wang$defs:
45*e95f2b21SJingyi Wang  qcom-maili-tlmm-state:
46*e95f2b21SJingyi Wang    type: object
47*e95f2b21SJingyi Wang    description:
48*e95f2b21SJingyi Wang      Pinctrl node's client devices use subnodes for desired pin configuration.
49*e95f2b21SJingyi Wang      Client device subnodes use below standard properties.
50*e95f2b21SJingyi Wang    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51*e95f2b21SJingyi Wang    unevaluatedProperties: false
52*e95f2b21SJingyi Wang
53*e95f2b21SJingyi Wang    properties:
54*e95f2b21SJingyi Wang      pins:
55*e95f2b21SJingyi Wang        description:
56*e95f2b21SJingyi Wang          List of gpio pins affected by the properties specified in this
57*e95f2b21SJingyi Wang          subnode.
58*e95f2b21SJingyi Wang        items:
59*e95f2b21SJingyi Wang          oneOf:
60*e95f2b21SJingyi Wang            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9]|21[0-9]|22[0-5])$"
61*e95f2b21SJingyi Wang            - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]
62*e95f2b21SJingyi Wang        minItems: 1
63*e95f2b21SJingyi Wang        maxItems: 36
64*e95f2b21SJingyi Wang
65*e95f2b21SJingyi Wang      function:
66*e95f2b21SJingyi Wang        description:
67*e95f2b21SJingyi Wang          Specify the alternative function to be configured for the specified
68*e95f2b21SJingyi Wang          pins.
69*e95f2b21SJingyi Wang        enum: [ gpio, aoss_cti, atest_char, atest_usb, audio_ext_mclk,
70*e95f2b21SJingyi Wang                audio_ref_clk, cam_mclk, cci_async_in, cci_i2c0, cci_i2c1,
71*e95f2b21SJingyi Wang                cci_i2c2, cci_i2c3, cci_timer, coex_espmi, coex_uart1_rx,
72*e95f2b21SJingyi Wang                coex_uart1_tx, dbg_out_clk, ddr_bist, ddr_pxi, dp_hot, egpio,
73*e95f2b21SJingyi Wang                gcc_gp, gnss_adc, host2wlan_sol, host_rst, i2chub0_se0,
74*e95f2b21SJingyi Wang                i2chub0_se1, i2chub0_se2, i2chub0_se3, i2chub0_se4, i2s0, i2s1,
75*e95f2b21SJingyi Wang                ibi_i3c, ibi_i3c_qup5_se0, jitter_bist, mdp_esync0, mdp_esync1,
76*e95f2b21SJingyi Wang                mdp_esync2, mdp_vsync, mdp_vsync_e, mdp_vsync_p, mdp_vsync0_out,
77*e95f2b21SJingyi Wang                mdp_vsync1_out, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync5_out,
78*e95f2b21SJingyi Wang                modem_pps_in, modem_pps_out, nav_gpio, nav_gpio0, nav_gpio3,
79*e95f2b21SJingyi Wang                nav_rffe, pcie0_clk_req_n, pcie1_clk_req_n, pcie1_rst_n,
80*e95f2b21SJingyi Wang                phase_flag, pll_bist_sync, pll_clk_aux, qdss_cti, qlink, qspi,
81*e95f2b21SJingyi Wang                qspi_clk, qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se3,
82*e95f2b21SJingyi Wang                qup1_se4, qup1_se5, qup1_se6, qup1_se7, qup2_se0, qup2_se1,
83*e95f2b21SJingyi Wang                qup2_se2, qup2_se3, qup2_se4_01, qup2_se4_23, qup3_se0,
84*e95f2b21SJingyi Wang                qup3_se1, qup3_se2, qup3_se3, qup3_se4, qup3_se5, qup4_se0,
85*e95f2b21SJingyi Wang                qup4_se1, qup4_se2, qup4_se3_01, qup4_se3_23, qup4_se3_l3,
86*e95f2b21SJingyi Wang                qup4_se4_01, qup4_se4_23, qup4_se4_l3, qup5_se0, rng_rosc,
87*e95f2b21SJingyi Wang                sd_write_protect, sdc2_clk, sdc2_cmd, sdc2_data, sdc2_rclk,
88*e95f2b21SJingyi Wang                sdc4_clk, sdc4_cmd, sdc4_data, sys_throttle, tb_trig_sdc,
89*e95f2b21SJingyi Wang                tmess_rng, tsense_clm, tsense_pwm, uim0, uim1, usb0_hs, usb_phy,
90*e95f2b21SJingyi Wang                vfr, vsense_trigger_mirnat, wcn_sw ]
91*e95f2b21SJingyi Wang
92*e95f2b21SJingyi Wang    required:
93*e95f2b21SJingyi Wang      - pins
94*e95f2b21SJingyi Wang
95*e95f2b21SJingyi Wangrequired:
96*e95f2b21SJingyi Wang  - compatible
97*e95f2b21SJingyi Wang  - reg
98*e95f2b21SJingyi Wang
99*e95f2b21SJingyi WangunevaluatedProperties: false
100*e95f2b21SJingyi Wang
101*e95f2b21SJingyi Wangexamples:
102*e95f2b21SJingyi Wang  - |
103*e95f2b21SJingyi Wang    #include <dt-bindings/interrupt-controller/arm-gic.h>
104*e95f2b21SJingyi Wang
105*e95f2b21SJingyi Wang    tlmm: pinctrl@f100000 {
106*e95f2b21SJingyi Wang        compatible = "qcom,maili-tlmm";
107*e95f2b21SJingyi Wang        reg = <0x0f100000 0x300000>;
108*e95f2b21SJingyi Wang        interrupts = <GIC_ESPI 272 IRQ_TYPE_LEVEL_HIGH>;
109*e95f2b21SJingyi Wang        gpio-controller;
110*e95f2b21SJingyi Wang        #gpio-cells = <2>;
111*e95f2b21SJingyi Wang        gpio-ranges = <&tlmm 0 0 227>;
112*e95f2b21SJingyi Wang        interrupt-controller;
113*e95f2b21SJingyi Wang        #interrupt-cells = <2>;
114*e95f2b21SJingyi Wang
115*e95f2b21SJingyi Wang        qup-uart7-state {
116*e95f2b21SJingyi Wang          pins = "gpio62", "gpio63";
117*e95f2b21SJingyi Wang          function = "qup1_se7";
118*e95f2b21SJingyi Wang        };
119*e95f2b21SJingyi Wang    };
120*e95f2b21SJingyi Wang...
121