1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-common.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SoC LPASS LPI TLMM Common Properties 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 12 - Krzysztof Kozlowski <krzk@kernel.org> 13 14description: 15 Common properties for the Top Level Mode Multiplexer pin controllers in the 16 Low Power Audio SubSystem (LPASS) Low Power Island (LPI) of Qualcomm SoCs. 17 18properties: 19 gpio-controller: true 20 21 "#gpio-cells": 22 description: 23 Specifying the pin number and flags, as defined in 24 include/dt-bindings/gpio/gpio.h 25 const: 2 26 27 gpio-ranges: 28 maxItems: 1 29 30 gpio-reserved-ranges: 31 minItems: 1 32 maxItems: 30 33 description: 34 Pins can be reserved for trusted applications or for LPASS, thereby 35 inaccessible from the OS. This property can be used to mark the pins 36 which resources should not be accessed by the OS. 37 38required: 39 - gpio-controller 40 - "#gpio-cells" 41 - gpio-ranges 42 43allOf: 44 - $ref: pinctrl.yaml# 45 46additionalProperties: true 47 48$defs: 49 qcom-tlmm-state: 50 properties: 51 drive-strength: 52 enum: [2, 4, 6, 8, 10, 12, 14, 16] 53 default: 2 54 description: 55 Selects the drive strength for the specified pins, in mA. 56 57 slew-rate: 58 enum: [0, 1, 2, 3] 59 default: 0 60 description: | 61 0: No adjustments 62 1: Higher Slew rate (faster edges) 63 2: Lower Slew rate (slower edges) 64 3: Reserved (No adjustments) 65 66 bias-bus-hold: true 67 bias-pull-down: true 68 bias-pull-up: true 69 bias-disable: true 70 input-enable: true 71 output-high: true 72 output-low: true 73 74 required: 75 - pins 76 - function 77 78 allOf: 79 - $ref: pincfg-node.yaml# 80 - $ref: pinmux-node.yaml# 81 82 additionalProperties: true 83 84