1*268e97ccSKrzysztof Kozlowski# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*268e97ccSKrzysztof Kozlowski%YAML 1.2 3*268e97ccSKrzysztof Kozlowski--- 4*268e97ccSKrzysztof Kozlowski$id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml# 5*268e97ccSKrzysztof Kozlowski$schema: http://devicetree.org/meta-schemas/core.yaml# 6*268e97ccSKrzysztof Kozlowski 7*268e97ccSKrzysztof Kozlowskititle: Qualcomm SM8550 SoC LPASS LPI TLMM 8*268e97ccSKrzysztof Kozlowski 9*268e97ccSKrzysztof Kozlowskimaintainers: 10*268e97ccSKrzysztof Kozlowski - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11*268e97ccSKrzysztof Kozlowski - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 12*268e97ccSKrzysztof Kozlowski 13*268e97ccSKrzysztof Kozlowskidescription: 14*268e97ccSKrzysztof Kozlowski Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem 15*268e97ccSKrzysztof Kozlowski (LPASS) Low Power Island (LPI) of Qualcomm SM8550 SoC. 16*268e97ccSKrzysztof Kozlowski 17*268e97ccSKrzysztof Kozlowskiproperties: 18*268e97ccSKrzysztof Kozlowski compatible: 19*268e97ccSKrzysztof Kozlowski const: qcom,sm8550-lpass-lpi-pinctrl 20*268e97ccSKrzysztof Kozlowski 21*268e97ccSKrzysztof Kozlowski reg: 22*268e97ccSKrzysztof Kozlowski items: 23*268e97ccSKrzysztof Kozlowski - description: LPASS LPI TLMM Control and Status registers 24*268e97ccSKrzysztof Kozlowski - description: LPASS LPI pins SLEW registers 25*268e97ccSKrzysztof Kozlowski 26*268e97ccSKrzysztof Kozlowski clocks: 27*268e97ccSKrzysztof Kozlowski items: 28*268e97ccSKrzysztof Kozlowski - description: LPASS Core voting clock 29*268e97ccSKrzysztof Kozlowski - description: LPASS Audio voting clock 30*268e97ccSKrzysztof Kozlowski 31*268e97ccSKrzysztof Kozlowski clock-names: 32*268e97ccSKrzysztof Kozlowski items: 33*268e97ccSKrzysztof Kozlowski - const: core 34*268e97ccSKrzysztof Kozlowski - const: audio 35*268e97ccSKrzysztof Kozlowski 36*268e97ccSKrzysztof Kozlowski gpio-controller: true 37*268e97ccSKrzysztof Kozlowski 38*268e97ccSKrzysztof Kozlowski "#gpio-cells": 39*268e97ccSKrzysztof Kozlowski description: Specifying the pin number and flags, as defined in 40*268e97ccSKrzysztof Kozlowski include/dt-bindings/gpio/gpio.h 41*268e97ccSKrzysztof Kozlowski const: 2 42*268e97ccSKrzysztof Kozlowski 43*268e97ccSKrzysztof Kozlowski gpio-ranges: 44*268e97ccSKrzysztof Kozlowski maxItems: 1 45*268e97ccSKrzysztof Kozlowski 46*268e97ccSKrzysztof KozlowskipatternProperties: 47*268e97ccSKrzysztof Kozlowski "-state$": 48*268e97ccSKrzysztof Kozlowski oneOf: 49*268e97ccSKrzysztof Kozlowski - $ref: "#/$defs/qcom-sm8550-lpass-state" 50*268e97ccSKrzysztof Kozlowski - patternProperties: 51*268e97ccSKrzysztof Kozlowski "-pins$": 52*268e97ccSKrzysztof Kozlowski $ref: "#/$defs/qcom-sm8550-lpass-state" 53*268e97ccSKrzysztof Kozlowski additionalProperties: false 54*268e97ccSKrzysztof Kozlowski 55*268e97ccSKrzysztof Kozlowski$defs: 56*268e97ccSKrzysztof Kozlowski qcom-sm8550-lpass-state: 57*268e97ccSKrzysztof Kozlowski type: object 58*268e97ccSKrzysztof Kozlowski description: 59*268e97ccSKrzysztof Kozlowski Pinctrl node's client devices use subnodes for desired pin configuration. 60*268e97ccSKrzysztof Kozlowski Client device subnodes use below standard properties. 61*268e97ccSKrzysztof Kozlowski $ref: /schemas/pinctrl/pincfg-node.yaml 62*268e97ccSKrzysztof Kozlowski 63*268e97ccSKrzysztof Kozlowski properties: 64*268e97ccSKrzysztof Kozlowski pins: 65*268e97ccSKrzysztof Kozlowski description: 66*268e97ccSKrzysztof Kozlowski List of gpio pins affected by the properties specified in this 67*268e97ccSKrzysztof Kozlowski subnode. 68*268e97ccSKrzysztof Kozlowski items: 69*268e97ccSKrzysztof Kozlowski pattern: "^gpio([0-9]|1[0-9]|2[0-2])$" 70*268e97ccSKrzysztof Kozlowski 71*268e97ccSKrzysztof Kozlowski function: 72*268e97ccSKrzysztof Kozlowski enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk, 73*268e97ccSKrzysztof Kozlowski dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b, 74*268e97ccSKrzysztof Kozlowski ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk, 75*268e97ccSKrzysztof Kozlowski i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk, 76*268e97ccSKrzysztof Kozlowski i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws, i2s4_clk, 77*268e97ccSKrzysztof Kozlowski i2s4_data, i2s4_ws, slimbus_clk, slimbus_data, swr_rx_clk, 78*268e97ccSKrzysztof Kozlowski swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk, 79*268e97ccSKrzysztof Kozlowski wsa_swr_data, wsa2_swr_clk, wsa2_swr_data ] 80*268e97ccSKrzysztof Kozlowski description: 81*268e97ccSKrzysztof Kozlowski Specify the alternative function to be configured for the specified 82*268e97ccSKrzysztof Kozlowski pins. 83*268e97ccSKrzysztof Kozlowski 84*268e97ccSKrzysztof Kozlowski drive-strength: 85*268e97ccSKrzysztof Kozlowski enum: [2, 4, 6, 8, 10, 12, 14, 16] 86*268e97ccSKrzysztof Kozlowski default: 2 87*268e97ccSKrzysztof Kozlowski description: 88*268e97ccSKrzysztof Kozlowski Selects the drive strength for the specified pins, in mA. 89*268e97ccSKrzysztof Kozlowski 90*268e97ccSKrzysztof Kozlowski slew-rate: 91*268e97ccSKrzysztof Kozlowski enum: [0, 1, 2, 3] 92*268e97ccSKrzysztof Kozlowski default: 0 93*268e97ccSKrzysztof Kozlowski description: | 94*268e97ccSKrzysztof Kozlowski 0: No adjustments 95*268e97ccSKrzysztof Kozlowski 1: Higher Slew rate (faster edges) 96*268e97ccSKrzysztof Kozlowski 2: Lower Slew rate (slower edges) 97*268e97ccSKrzysztof Kozlowski 3: Reserved (No adjustments) 98*268e97ccSKrzysztof Kozlowski 99*268e97ccSKrzysztof Kozlowski bias-pull-down: true 100*268e97ccSKrzysztof Kozlowski bias-pull-up: true 101*268e97ccSKrzysztof Kozlowski bias-disable: true 102*268e97ccSKrzysztof Kozlowski output-high: true 103*268e97ccSKrzysztof Kozlowski output-low: true 104*268e97ccSKrzysztof Kozlowski 105*268e97ccSKrzysztof Kozlowski required: 106*268e97ccSKrzysztof Kozlowski - pins 107*268e97ccSKrzysztof Kozlowski - function 108*268e97ccSKrzysztof Kozlowski 109*268e97ccSKrzysztof Kozlowski additionalProperties: false 110*268e97ccSKrzysztof Kozlowski 111*268e97ccSKrzysztof KozlowskiallOf: 112*268e97ccSKrzysztof Kozlowski - $ref: pinctrl.yaml# 113*268e97ccSKrzysztof Kozlowski 114*268e97ccSKrzysztof Kozlowskirequired: 115*268e97ccSKrzysztof Kozlowski - compatible 116*268e97ccSKrzysztof Kozlowski - reg 117*268e97ccSKrzysztof Kozlowski - clocks 118*268e97ccSKrzysztof Kozlowski - clock-names 119*268e97ccSKrzysztof Kozlowski - gpio-controller 120*268e97ccSKrzysztof Kozlowski - "#gpio-cells" 121*268e97ccSKrzysztof Kozlowski - gpio-ranges 122*268e97ccSKrzysztof Kozlowski 123*268e97ccSKrzysztof KozlowskiadditionalProperties: false 124*268e97ccSKrzysztof Kozlowski 125*268e97ccSKrzysztof Kozlowskiexamples: 126*268e97ccSKrzysztof Kozlowski - | 127*268e97ccSKrzysztof Kozlowski #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> 128*268e97ccSKrzysztof Kozlowski 129*268e97ccSKrzysztof Kozlowski lpass_tlmm: pinctrl@6e80000 { 130*268e97ccSKrzysztof Kozlowski compatible = "qcom,sm8550-lpass-lpi-pinctrl"; 131*268e97ccSKrzysztof Kozlowski reg = <0x06e80000 0x20000>, 132*268e97ccSKrzysztof Kozlowski <0x0725a000 0x10000>; 133*268e97ccSKrzysztof Kozlowski 134*268e97ccSKrzysztof Kozlowski clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 135*268e97ccSKrzysztof Kozlowski <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 136*268e97ccSKrzysztof Kozlowski clock-names = "core", "audio"; 137*268e97ccSKrzysztof Kozlowski 138*268e97ccSKrzysztof Kozlowski gpio-controller; 139*268e97ccSKrzysztof Kozlowski #gpio-cells = <2>; 140*268e97ccSKrzysztof Kozlowski gpio-ranges = <&lpass_tlmm 0 0 23>; 141*268e97ccSKrzysztof Kozlowski 142*268e97ccSKrzysztof Kozlowski tx-swr-sleep-clk-state { 143*268e97ccSKrzysztof Kozlowski pins = "gpio0"; 144*268e97ccSKrzysztof Kozlowski function = "swr_tx_clk"; 145*268e97ccSKrzysztof Kozlowski drive-strength = <2>; 146*268e97ccSKrzysztof Kozlowski bias-pull-down; 147*268e97ccSKrzysztof Kozlowski }; 148*268e97ccSKrzysztof Kozlowski }; 149