xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml (revision ea68a3e9d14e9e0bf017d178fb4bd53b6deb1482) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block
8
9maintainers:
10  - Iskren Chernev <iskren.chernev@gmail.com>
11
12description:
13  Top Level Mode Multiplexer pin controller in Qualcomm SM4250 and SM6115
14  SoCs.
15
16properties:
17  compatible:
18    const: qcom,sm6115-tlmm
19
20  reg:
21    maxItems: 3
22
23  reg-names:
24    items:
25      - const: west
26      - const: south
27      - const: east
28
29  interrupts:
30    maxItems: 1
31
32  interrupt-controller: true
33  "#interrupt-cells": true
34  gpio-controller: true
35  "#gpio-cells": true
36  gpio-ranges: true
37  gpio-reserved-ranges: true
38  wakeup-parent: true
39
40patternProperties:
41  "-state$":
42    oneOf:
43      - $ref: "#/$defs/qcom-sm6115-tlmm-state"
44      - patternProperties:
45          "-pins$":
46            $ref: "#/$defs/qcom-sm6115-tlmm-state"
47        additionalProperties: false
48
49$defs:
50  qcom-sm6115-tlmm-state:
51    type: object
52    description:
53      Pinctrl node's client devices use subnodes for desired pin configuration.
54      Client device subnodes use below standard properties.
55    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
56
57    properties:
58      pins:
59        description:
60          List of gpio pins affected by the properties specified in this
61          subnode.
62        items:
63          oneOf:
64            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
65            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,
66                      sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
67        minItems: 1
68        maxItems: 36
69
70      function:
71        description:
72          Specify the alternative function to be configured for the specified
73          pins.
74
75        enum: [ adsp_ext, agera_pll, atest, cam_mclk, cci_async, cci_i2c,
76                cci_timer, cri_trng, dac_calib, dbg_out, ddr_bist, ddr_pxi0,
77                ddr_pxi1, ddr_pxi2, ddr_pxi3, gcc_gp1, gcc_gp2, gcc_gp3, gpio,
78                gp_pdm0, gp_pdm1, gp_pdm2, gsm0_tx, gsm1_tx, jitter_bist,
79                mdp_vsync, mdp_vsync_out_0, mdp_vsync_out_1, mpm_pwr, mss_lte,
80                m_voc, nav_gpio, pa_indicator, pbs, pbs_out, phase_flag,
81                pll_bist, pll_bypassnl, pll_reset, prng_rosc, qdss_cti,
82                qdss_gpio, qup0, qup1, qup2, qup3, qup4, qup5, sdc1_tb,
83                sdc2_tb, sd_write, ssbi_wtr1, tgu, tsense_pwm, uim1_clk,
84                uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,
85                uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger,
86                wlan1_adc0, elan1_adc1 ]
87
88      bias-pull-down: true
89      bias-pull-up: true
90      bias-disable: true
91      drive-strength: true
92      output-high: true
93      output-low: true
94
95    required:
96      - pins
97
98    additionalProperties: false
99
100allOf:
101  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
102
103required:
104  - compatible
105  - reg
106  - reg-names
107
108additionalProperties: false
109
110examples:
111  - |
112    #include <dt-bindings/interrupt-controller/arm-gic.h>
113    tlmm: pinctrl@500000 {
114        compatible = "qcom,sm6115-tlmm";
115        reg = <0x500000 0x400000>,
116              <0x900000 0x400000>,
117              <0xd00000 0x400000>;
118        reg-names = "west", "south", "east";
119        interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
120        gpio-controller;
121        #gpio-cells = <2>;
122        interrupt-controller;
123        #interrupt-cells = <2>;
124        gpio-ranges = <&tlmm 0 0 114>;
125
126        sdc2_on_state: sdc2-on-state {
127            clk-pins {
128                pins = "sdc2_clk";
129                bias-disable;
130                drive-strength = <16>;
131            };
132
133            cmd-pins {
134                pins = "sdc2_cmd";
135                bias-pull-up;
136                drive-strength = <10>;
137            };
138
139            data-pins {
140                pins = "sdc2_data";
141                bias-pull-up;
142                drive-strength = <10>;
143            };
144
145            sd-cd-pins {
146                pins = "gpio88";
147                function = "gpio";
148                bias-pull-up;
149                drive-strength = <2>;
150            };
151        };
152    };
153