xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM4250 SoC LPASS LPI TLMM
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12description:
13  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14  (LPASS) Low Power Island (LPI) of Qualcomm SM4250 SoC.
15
16properties:
17  compatible:
18    const: qcom,sm4250-lpass-lpi-pinctrl
19
20  reg:
21    items:
22      - description: LPASS LPI TLMM Control and Status registers
23      - description: LPASS LPI MCC registers
24
25  clocks:
26    items:
27      - description: LPASS Audio voting clock
28
29  clock-names:
30    items:
31      - const: audio
32
33patternProperties:
34  "-state$":
35    oneOf:
36      - $ref: "#/$defs/qcom-sm4250-lpass-state"
37      - patternProperties:
38          "-pins$":
39            $ref: "#/$defs/qcom-sm4250-lpass-state"
40        additionalProperties: false
41
42$defs:
43  qcom-sm4250-lpass-state:
44    type: object
45    description:
46      Pinctrl node's client devices use subnodes for desired pin configuration.
47      Client device subnodes use below standard properties.
48    $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
49    unevaluatedProperties: false
50
51    properties:
52      pins:
53        description:
54          List of gpio pins affected by the properties specified in this
55          subnode.
56        items:
57          pattern: "^gpio([0-9]|1[0-9]|2[0-6])$"
58
59      function:
60        enum: [ gpio, dmic01_clk, dmic01_data, dmic23_clk, dmic23_data,
61                dmic4_clk, dmic4_data, ext_mclk0_a, ext_mclk0_b, ext_mclk1_a,
62                ext_mclk1_b, ext_mclk1_c, i2s1_clk, i2s1_data, i2s1_ws,
63                i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws,
64                qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws, slim_clk, slim_data,
65                swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, swr_wsa_clk,
66                swr_wsa_data ]
67        description:
68          Specify the alternative function to be configured for the specified
69          pins.
70
71allOf:
72  - $ref: qcom,lpass-lpi-common.yaml#
73
74required:
75  - compatible
76  - reg
77  - clocks
78  - clock-names
79
80unevaluatedProperties: false
81
82examples:
83  - |
84    #include <dt-bindings/sound/qcom,q6afe.h>
85    lpi_tlmm: pinctrl@a7c0000 {
86        compatible = "qcom,sm4250-lpass-lpi-pinctrl";
87        reg = <0xa7c0000 0x20000>,
88              <0xa950000 0x10000>;
89        clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
90        clock-names = "audio";
91        gpio-controller;
92        #gpio-cells = <2>;
93        gpio-ranges = <&lpi_tlmm 0 0 19>;
94
95        i2s2-active-state {
96            clk-pins {
97                pins = "gpio10";
98                function = "i2s2_clk";
99                drive-strength = <2>;
100                slew-rate = <1>;
101                bias-disable;
102            };
103
104            data-pins {
105                pins = "gpio12";
106                function = "i2s2_data";
107                drive-strength = <2>;
108                slew-rate = <1>;
109            };
110        };
111
112        i2s2-sleep-clk-state {
113            pins = "gpio10";
114            function = "i2s2_clk";
115            drive-strength = <2>;
116            bias-pull-down;
117        };
118    };
119