1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SC7280 SoC LPASS LPI TLMM 8 9maintainers: 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11 12description: 13 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem 14 (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC. 15 16properties: 17 compatible: 18 const: qcom,sc7280-lpass-lpi-pinctrl 19 20 reg: 21 maxItems: 2 22 23patternProperties: 24 "-state$": 25 oneOf: 26 - $ref: "#/$defs/qcom-sc7280-lpass-state" 27 - patternProperties: 28 "-pins$": 29 $ref: "#/$defs/qcom-sc7280-lpass-state" 30 additionalProperties: false 31 32$defs: 33 qcom-sc7280-lpass-state: 34 type: object 35 description: 36 Pinctrl node's client devices use subnodes for desired pin configuration. 37 Client device subnodes use below standard properties. 38 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state 39 unevaluatedProperties: false 40 41 properties: 42 pins: 43 description: 44 List of gpio pins affected by the properties specified in this 45 subnode. 46 items: 47 oneOf: 48 - pattern: "^gpio([0-9]|1[0-4])$" 49 minItems: 1 50 maxItems: 15 51 52 function: 53 enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws, 54 qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk, 55 dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data, 56 i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk, 57 dmic3_data, i2s2_data ] 58 description: 59 Specify the alternative function to be configured for the specified 60 pins. 61 62required: 63 - compatible 64 - reg 65 66allOf: 67 - $ref: qcom,lpass-lpi-common.yaml# 68 69unevaluatedProperties: false 70 71examples: 72 - | 73 lpass_tlmm: pinctrl@33c0000 { 74 compatible = "qcom,sc7280-lpass-lpi-pinctrl"; 75 reg = <0x33c0000 0x20000>, 76 <0x3550000 0x10000>; 77 gpio-controller; 78 #gpio-cells = <2>; 79 gpio-ranges = <&lpass_tlmm 0 0 15>; 80 81 dmic01-state { 82 dmic01-clk-pins { 83 pins = "gpio6"; 84 function = "dmic1_clk"; 85 }; 86 87 dmic01-clk-sleep-pins { 88 pins = "gpio6"; 89 function = "dmic1_clk"; 90 }; 91 }; 92 93 tx-swr-data-sleep-state { 94 pins = "gpio1", "gpio2", "gpio14"; 95 function = "swr_tx_data"; 96 }; 97 }; 98