1*6af63b66SSrinivasa Rao Mandadapu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*6af63b66SSrinivasa Rao Mandadapu%YAML 1.2 3*6af63b66SSrinivasa Rao Mandadapu--- 4*6af63b66SSrinivasa Rao Mandadapu$id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml# 5*6af63b66SSrinivasa Rao Mandadapu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*6af63b66SSrinivasa Rao Mandadapu 7*6af63b66SSrinivasa Rao Mandadaputitle: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) 8*6af63b66SSrinivasa Rao Mandadapu Low Power Island (LPI) TLMM block 9*6af63b66SSrinivasa Rao Mandadapu 10*6af63b66SSrinivasa Rao Mandadapumaintainers: 11*6af63b66SSrinivasa Rao Mandadapu - Srinivasa Rao Mandadapu <srivasam@codeaurora.org> 12*6af63b66SSrinivasa Rao Mandadapu - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13*6af63b66SSrinivasa Rao Mandadapu 14*6af63b66SSrinivasa Rao Mandadapudescription: | 15*6af63b66SSrinivasa Rao Mandadapu This binding describes the Top Level Mode Multiplexer block found in the 16*6af63b66SSrinivasa Rao Mandadapu LPASS LPI IP on most Qualcomm SoCs 17*6af63b66SSrinivasa Rao Mandadapu 18*6af63b66SSrinivasa Rao Mandadapuproperties: 19*6af63b66SSrinivasa Rao Mandadapu compatible: 20*6af63b66SSrinivasa Rao Mandadapu const: qcom,sc7280-lpass-lpi-pinctrl 21*6af63b66SSrinivasa Rao Mandadapu 22*6af63b66SSrinivasa Rao Mandadapu reg: 23*6af63b66SSrinivasa Rao Mandadapu minItems: 2 24*6af63b66SSrinivasa Rao Mandadapu maxItems: 2 25*6af63b66SSrinivasa Rao Mandadapu 26*6af63b66SSrinivasa Rao Mandadapu gpio-controller: true 27*6af63b66SSrinivasa Rao Mandadapu 28*6af63b66SSrinivasa Rao Mandadapu '#gpio-cells': 29*6af63b66SSrinivasa Rao Mandadapu description: Specifying the pin number and flags, as defined in 30*6af63b66SSrinivasa Rao Mandadapu include/dt-bindings/gpio/gpio.h 31*6af63b66SSrinivasa Rao Mandadapu const: 2 32*6af63b66SSrinivasa Rao Mandadapu 33*6af63b66SSrinivasa Rao Mandadapu gpio-ranges: 34*6af63b66SSrinivasa Rao Mandadapu maxItems: 1 35*6af63b66SSrinivasa Rao Mandadapu 36*6af63b66SSrinivasa Rao Mandadapu#PIN CONFIGURATION NODES 37*6af63b66SSrinivasa Rao MandadapupatternProperties: 38*6af63b66SSrinivasa Rao Mandadapu '-pins$': 39*6af63b66SSrinivasa Rao Mandadapu type: object 40*6af63b66SSrinivasa Rao Mandadapu description: 41*6af63b66SSrinivasa Rao Mandadapu Pinctrl node's client devices use subnodes for desired pin configuration. 42*6af63b66SSrinivasa Rao Mandadapu Client device subnodes use below standard properties. 43*6af63b66SSrinivasa Rao Mandadapu $ref: "/schemas/pinctrl/pincfg-node.yaml" 44*6af63b66SSrinivasa Rao Mandadapu 45*6af63b66SSrinivasa Rao Mandadapu properties: 46*6af63b66SSrinivasa Rao Mandadapu pins: 47*6af63b66SSrinivasa Rao Mandadapu description: 48*6af63b66SSrinivasa Rao Mandadapu List of gpio pins affected by the properties specified in this 49*6af63b66SSrinivasa Rao Mandadapu subnode. 50*6af63b66SSrinivasa Rao Mandadapu items: 51*6af63b66SSrinivasa Rao Mandadapu oneOf: 52*6af63b66SSrinivasa Rao Mandadapu - pattern: "^gpio([0-9]|[1-9][0-9])$" 53*6af63b66SSrinivasa Rao Mandadapu minItems: 1 54*6af63b66SSrinivasa Rao Mandadapu maxItems: 15 55*6af63b66SSrinivasa Rao Mandadapu 56*6af63b66SSrinivasa Rao Mandadapu function: 57*6af63b66SSrinivasa Rao Mandadapu enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws, 58*6af63b66SSrinivasa Rao Mandadapu qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk, 59*6af63b66SSrinivasa Rao Mandadapu dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data, 60*6af63b66SSrinivasa Rao Mandadapu i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk, 61*6af63b66SSrinivasa Rao Mandadapu dmic3_data, i2s2_data ] 62*6af63b66SSrinivasa Rao Mandadapu description: 63*6af63b66SSrinivasa Rao Mandadapu Specify the alternative function to be configured for the specified 64*6af63b66SSrinivasa Rao Mandadapu pins. 65*6af63b66SSrinivasa Rao Mandadapu 66*6af63b66SSrinivasa Rao Mandadapu drive-strength: 67*6af63b66SSrinivasa Rao Mandadapu enum: [2, 4, 6, 8, 10, 12, 14, 16] 68*6af63b66SSrinivasa Rao Mandadapu default: 2 69*6af63b66SSrinivasa Rao Mandadapu description: 70*6af63b66SSrinivasa Rao Mandadapu Selects the drive strength for the specified pins, in mA. 71*6af63b66SSrinivasa Rao Mandadapu 72*6af63b66SSrinivasa Rao Mandadapu slew-rate: 73*6af63b66SSrinivasa Rao Mandadapu enum: [0, 1, 2, 3] 74*6af63b66SSrinivasa Rao Mandadapu default: 0 75*6af63b66SSrinivasa Rao Mandadapu description: | 76*6af63b66SSrinivasa Rao Mandadapu 0: No adjustments 77*6af63b66SSrinivasa Rao Mandadapu 1: Higher Slew rate (faster edges) 78*6af63b66SSrinivasa Rao Mandadapu 2: Lower Slew rate (slower edges) 79*6af63b66SSrinivasa Rao Mandadapu 3: Reserved (No adjustments) 80*6af63b66SSrinivasa Rao Mandadapu 81*6af63b66SSrinivasa Rao Mandadapu bias-pull-down: true 82*6af63b66SSrinivasa Rao Mandadapu 83*6af63b66SSrinivasa Rao Mandadapu bias-pull-up: true 84*6af63b66SSrinivasa Rao Mandadapu 85*6af63b66SSrinivasa Rao Mandadapu bias-disable: true 86*6af63b66SSrinivasa Rao Mandadapu 87*6af63b66SSrinivasa Rao Mandadapu output-high: true 88*6af63b66SSrinivasa Rao Mandadapu 89*6af63b66SSrinivasa Rao Mandadapu output-low: true 90*6af63b66SSrinivasa Rao Mandadapu 91*6af63b66SSrinivasa Rao Mandadapu required: 92*6af63b66SSrinivasa Rao Mandadapu - pins 93*6af63b66SSrinivasa Rao Mandadapu - function 94*6af63b66SSrinivasa Rao Mandadapu 95*6af63b66SSrinivasa Rao Mandadapu additionalProperties: false 96*6af63b66SSrinivasa Rao Mandadapu 97*6af63b66SSrinivasa Rao Mandadapurequired: 98*6af63b66SSrinivasa Rao Mandadapu - compatible 99*6af63b66SSrinivasa Rao Mandadapu - reg 100*6af63b66SSrinivasa Rao Mandadapu - gpio-controller 101*6af63b66SSrinivasa Rao Mandadapu - '#gpio-cells' 102*6af63b66SSrinivasa Rao Mandadapu - gpio-ranges 103*6af63b66SSrinivasa Rao Mandadapu 104*6af63b66SSrinivasa Rao MandadapuadditionalProperties: false 105*6af63b66SSrinivasa Rao Mandadapu 106*6af63b66SSrinivasa Rao Mandadapuexamples: 107*6af63b66SSrinivasa Rao Mandadapu - | 108*6af63b66SSrinivasa Rao Mandadapu lpass_tlmm: pinctrl@33c0000 { 109*6af63b66SSrinivasa Rao Mandadapu compatible = "qcom,sc7280-lpass-lpi-pinctrl"; 110*6af63b66SSrinivasa Rao Mandadapu reg = <0x33c0000 0x20000>, 111*6af63b66SSrinivasa Rao Mandadapu <0x3550000 0x10000>; 112*6af63b66SSrinivasa Rao Mandadapu gpio-controller; 113*6af63b66SSrinivasa Rao Mandadapu #gpio-cells = <2>; 114*6af63b66SSrinivasa Rao Mandadapu gpio-ranges = <&lpass_tlmm 0 0 15>; 115*6af63b66SSrinivasa Rao Mandadapu }; 116